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([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-219dca04c33sm59503685ad.247.2024.12.22.09.53.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Dec 2024 09:53:32 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH 2/9] arm64: dts: apple: t7000: Add cpufreq nodes Date: Mon, 23 Dec 2024 01:52:02 +0800 Message-ID: <20241222175314.151437-3-towinchenmi@gmail.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241222175314.151437-1-towinchenmi@gmail.com> References: <20241222175314.151437-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241222_095333_565343_2C31F765 X-CRM114-Status: GOOD ( 11.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A8 SoC. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t7000-6.dtsi | 4 ++ arch/arm64/boot/dts/apple/t7000-j42d.dts | 4 ++ arch/arm64/boot/dts/apple/t7000-mini4.dtsi | 4 ++ arch/arm64/boot/dts/apple/t7000.dtsi | 46 ++++++++++++++++++++++ 4 files changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t7000-6.dtsi b/arch/arm64/boot/dts/apple/t7000-6.dtsi index f60ea4a4a387..0d08e2589449 100644 --- a/arch/arm64/boot/dts/apple/t7000-6.dtsi +++ b/arch/arm64/boot/dts/apple/t7000-6.dtsi @@ -48,3 +48,7 @@ switch-mute { }; }; }; + +&typhoon_opp06 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-j42d.dts b/arch/arm64/boot/dts/apple/t7000-j42d.dts index 2231db6a739d..24fe5a99f3ab 100644 --- a/arch/arm64/boot/dts/apple/t7000-j42d.dts +++ b/arch/arm64/boot/dts/apple/t7000-j42d.dts @@ -29,3 +29,7 @@ framebuffer0: framebuffer@0 { &serial6 { status = "okay"; }; + +&typhoon_opp06 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi index c64ddc402fda..773c69449902 100644 --- a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi +++ b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi @@ -49,3 +49,7 @@ switch-mute { }; }; }; + +&typhoon_opp06 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi index a7cc29e84c84..4105cf70391b 100644 --- a/arch/arm64/boot/dts/apple/t7000.dtsi +++ b/arch/arm64/boot/dts/apple/t7000.dtsi @@ -33,6 +33,8 @@ cpu0: cpu@0 { compatible = "apple,typhoon"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + performance-domains = <&cpufreq>; + operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -41,11 +43,49 @@ cpu1: cpu@1 { compatible = "apple,typhoon"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + performance-domains = <&cpufreq>; + operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; }; }; + typhoon_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <300>; + }; + opp02 { + opp-hz = /bits/ 64 <396000000>; + opp-level = <2>; + clock-latency-ns = <50000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <3>; + clock-latency-ns = <29000>; + }; + opp04 { + opp-hz = /bits/ 64 <840000000>; + opp-level = <4>; + clock-latency-ns = <29000>; + }; + opp05 { + opp-hz = /bits/ 64 <1128000000>; + opp-level = <5>; + clock-latency-ns = <36000>; + }; + typhoon_opp06: opp06 { + opp-hz = /bits/ 64 <1392000000>; + opp-level = <6>; + clock-latency-ns = <42000>; + status = "disabled"; /* Not available on N102 */ + }; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -53,6 +93,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202220000 { + compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq"; + reg = <0x2 0x02220000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0c0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0c0000 0x0 0x4000>;