[v2,2/3] clk: xilinx: vcu: don't set pll_ref as parent of VCU(enc/dec) clocks

Commit Message

Rohit Visavalia Jan. 2, 2025, 5:03 p.m. UTC

CCF will try to adjust parent clock to set desire clock frequency of
child clock. So if pll_ref is not a fixed-clock then while setting rate
of enc/dec clocks pll_ref may get change, which may make VCU malfunction.

Signed-off-by: Rohit Visavalia <[e-mail]>
---
Changes in v2:
  - none
  - Link to v1: https://lore.kernel.org/linux-clk/[e-mail]
---
 drivers/clk/xilinx/xlnx_vcu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Geert Uytterhoeven Jan. 2, 2025, 7:28 p.m. UTC | #1

Hi Rohit,

On Thu, Jan 2, 2025 at 6:04 PM Rohit Visavalia <[e-mail]> wrote:
> CCF will try to adjust parent clock to set desire clock frequency of
> child clock. So if pll_ref is not a fixed-clock then while setting rate
> of enc/dec clocks pll_ref may get change, which may make VCU malfunction.
>
> Signed-off-by: Rohit Visavalia <[e-mail]>
> ---
> Changes in v2:
>   - none
>   - Link to v1: https://lore.kernel.org/linux-clk/[e-mail]
> ---
>  drivers/clk/xilinx/xlnx_vcu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/xilinx/xlnx_vcu.c b/drivers/clk/xilinx/xlnx_vcu.c
> index 88b3fd8250c2..c520ae1ba65e 100644
> --- a/drivers/clk/xilinx/xlnx_vcu.c
> +++ b/drivers/clk/xilinx/xlnx_vcu.c
> @@ -547,7 +547,7 @@ static int xvcu_register_clock_provider(struct xvcu_device *xvcu)
>                 return PTR_ERR(hw);
>         xvcu->pll_post = hw;
>
> -       parent_data[0].fw_name = "pll_ref";
> +       parent_data[0].fw_name = "dummy_name";
>         parent_data[1].hw = xvcu->pll_post;
>
>         hws[CLK_XVCU_ENC_CORE] =

You completely ignored Stephen's comment, which suggests to not pas
CLK_SET_RATE_PARENT instead (see xvcu_clk_hw_register_leaf()).

Gr{oetje,eeting}s,

                        Geert

Rohit Visavalia Jan. 6, 2025, 10:04 a.m. UTC | #2

Hi Geert,

Thank for the review.

>-----Original Message-----
>From: Geert Uytterhoeven <[e-mail]>
>Sent: Friday, January 3, 2025 12:58 AM
>To: Visavalia, Rohit <[e-mail]>
>Cc: [e-mail]; [e-mail]; Simek, Michal
><[e-mail]>; Sagar, Vishal <[e-mail]>;
>[e-mail]; [e-mail]; u.kleine-
>[e-mail]; [e-mail]; linux-arm-
>[e-mail]; [e-mail]
>Subject: Re: [PATCH v2 2/3] clk: xilinx: vcu: don't set pll_ref as parent of
>VCU(enc/dec) clocks
>
>Hi Rohit,
>
>On Thu, Jan 2, 2025 at 6:04 PM Rohit Visavalia <[e-mail]> wrote:
>> CCF will try to adjust parent clock to set desire clock frequency of
>> child clock. So if pll_ref is not a fixed-clock then while setting
>> rate of enc/dec clocks pll_ref may get change, which may make VCU
>malfunction.
>>
>> Signed-off-by: Rohit Visavalia <[e-mail]>
>> ---
>> Changes in v2:
>>   - none
>>   - Link to v1:
>> https://lore.kernel.org/linux-clk/20241226122023.3439559-3-rohit.visav
>> [e-mail]
>> ---
>>  drivers/clk/xilinx/xlnx_vcu.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/xilinx/xlnx_vcu.c
>> b/drivers/clk/xilinx/xlnx_vcu.c index 88b3fd8250c2..c520ae1ba65e
>> 100644
>> --- a/drivers/clk/xilinx/xlnx_vcu.c
>> +++ b/drivers/clk/xilinx/xlnx_vcu.c
>> @@ -547,7 +547,7 @@ static int xvcu_register_clock_provider(struct
>xvcu_device *xvcu)
>>                 return PTR_ERR(hw);
>>         xvcu->pll_post = hw;
>>
>> -       parent_data[0].fw_name = "pll_ref";
>> +       parent_data[0].fw_name = "dummy_name";
>>         parent_data[1].hw = xvcu->pll_post;
>>
>>         hws[CLK_XVCU_ENC_CORE] =
>
>You completely ignored Stephen's comment, which suggests to not pas
>CLK_SET_RATE_PARENT instead (see xvcu_clk_hw_register_leaf()).

Thanks for pointing this out. Let me take care this in v3 patch series.

>
>Gr{oetje,eeting}s,
>
>                        Geert
>
>--
>Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [e-mail]
>
>In personal conversations with technical people, I call myself a hacker. But when
>I'm talking to journalists I just say "programmer" or something like that.
>                                -- Linus Torvalds

Thanks
Rohit

Rohit Visavalia Jan. 28, 2025, 9:54 a.m. UTC | #3

Hi @Geert Uytterhoeven, @Stephen Boyd <[e-mail]> 

>-----Original Message-----
>From: Visavalia, Rohit
>Sent: Monday, January 6, 2025 3:34 PM
>To: Geert Uytterhoeven <[e-mail]>
>Cc: [e-mail]; [e-mail]; Simek, Michal
><[e-mail]>; Sagar, Vishal <[e-mail]>;
>[e-mail]; [e-mail]; u.kleine-
>[e-mail]; [e-mail]; linux-arm-
>[e-mail]; [e-mail]
>Subject: RE: [PATCH v2 2/3] clk: xilinx: vcu: don't set pll_ref as parent of
>VCU(enc/dec) clocks
>
>Hi Geert,
>
>Thank for the review.
>
>>-----Original Message-----
>>From: Geert Uytterhoeven <[e-mail]>
>>Sent: Friday, January 3, 2025 12:58 AM
>>To: Visavalia, Rohit <[e-mail]>
>>Cc: [e-mail]; [e-mail]; Simek, Michal
>><[e-mail]>; Sagar, Vishal <[e-mail]>;
>>[e-mail]; [e-mail]; u.kleine-
>>[e-mail]; [e-mail]; linux-arm-
>>[e-mail]; [e-mail]
>>Subject: Re: [PATCH v2 2/3] clk: xilinx: vcu: don't set pll_ref as
>>parent of
>>VCU(enc/dec) clocks
>>
>>Hi Rohit,
>>
>>On Thu, Jan 2, 2025 at 6:04 PM Rohit Visavalia <[e-mail]> wrote:
>>> CCF will try to adjust parent clock to set desire clock frequency of
>>> child clock. So if pll_ref is not a fixed-clock then while setting
>>> rate of enc/dec clocks pll_ref may get change, which may make VCU
>>malfunction.
>>>
>>> Signed-off-by: Rohit Visavalia <[e-mail]>
>>> ---
>>> Changes in v2:
>>>   - none
>>>   - Link to v1:
>>> https://lore.kernel.org/linux-clk/20241226122023.3439559-3-rohit.visa
>>> v
>>> [e-mail]
>>> ---
>>>  drivers/clk/xilinx/xlnx_vcu.c | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/clk/xilinx/xlnx_vcu.c
>>> b/drivers/clk/xilinx/xlnx_vcu.c index 88b3fd8250c2..c520ae1ba65e
>>> 100644
>>> --- a/drivers/clk/xilinx/xlnx_vcu.c
>>> +++ b/drivers/clk/xilinx/xlnx_vcu.c
>>> @@ -547,7 +547,7 @@ static int xvcu_register_clock_provider(struct
>>xvcu_device *xvcu)
>>>                 return PTR_ERR(hw);
>>>         xvcu->pll_post = hw;
>>>
>>> -       parent_data[0].fw_name = "pll_ref";
>>> +       parent_data[0].fw_name = "dummy_name";
>>>         parent_data[1].hw = xvcu->pll_post;
>>>
>>>         hws[CLK_XVCU_ENC_CORE] =
>>
>>You completely ignored Stephen's comment, which suggests to not pas
>>CLK_SET_RATE_PARENT instead (see xvcu_clk_hw_register_leaf()).
>
>Thanks for pointing this out. Let me take care this in v3 patch series.

We can drop this patch[PATCH v2 2/3], as original issue was occurring when "pll_ref" clock is being changed to get the best desire clock rate for encoder and decoder. And now with recent changes in Xilinx clock driver(https://github.com/torvalds/linux/commit/b782921ddd7f84f524723090377903f399fdbbcb & https://github.com/torvalds/linux/commit/1fe15be1fb613534ecbac5f8c3f8744f757d237d) encoder and decoder are getting parent as "pll_post" to get best desire clock rate and not changing rate of "pll_ref".

Thanks
Rohit
>
>>
>>Gr{oetje,eeting}s,
>>
>>                        Geert
>>
>>--
>>Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
>>[e-mail]
>>
>>In personal conversations with technical people, I call myself a
>>hacker. But when I'm talking to journalists I just say "programmer" or something
>like that.
>>                                -- Linus Torvalds
>
>Thanks
>Rohit

Patch

diff --git a/drivers/clk/xilinx/xlnx_vcu.c b/drivers/clk/xilinx/xlnx_vcu.c
index 88b3fd8250c2..c520ae1ba65e 100644
--- a/drivers/clk/xilinx/xlnx_vcu.c
+++ b/drivers/clk/xilinx/xlnx_vcu.c
@@ -547,7 +547,7 @@  static int xvcu_register_clock_provider(struct xvcu_device *xvcu)
 		return PTR_ERR(hw);
 	xvcu->pll_post = hw;
 
-	parent_data[0].fw_name = "pll_ref";
+	parent_data[0].fw_name = "dummy_name";
 	parent_data[1].hw = xvcu->pll_post;
 
 	hws[CLK_XVCU_ENC_CORE] =