From patchwork Tue Jan 28 12:07:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Bruel X-Patchwork-Id: 13952520 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CC36C0218D for ; Tue, 28 Jan 2025 12:29:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=SYTacyFClbKzLmjOqzdhJPPxLmts2g5kWZai4fotd8s=; b=ORKsJhtzQ5uJEg5sTrOjVvgwdX KaC8KnsJ/XYH+2FT8phjcQTnqcvMyI6rMl+cFvt/MSHEQRvNoW46/K9aGEh9UWPw3Pq79rw53oxUm P2GEVdYtbrUueAZh+I212hXOU9MVMPuhkzJsCDj0KllNE/x9TWnRRInEIlAkWHOhkDfCzzHzPMYHl WcjONsdBBRmpCqa15Lcou4JG9vBIinF/JfQaSt3ZRLCBnZlzXmp2WF+jMpXxhBUF3WxFaN3EMy/wO jG2vLRHYyD7kzcsEbnmBPRAMf+H7tB8HQXvzQdkeNrGtCnTzR7Pp4Woya86TbZHJQfvRAGMJwByjJ wzSibypQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tcki4-00000004shL-3uhy; Tue, 28 Jan 2025 12:28:52 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tckXP-00000004rdz-0foa for linux-arm-kernel@lists.infradead.org; Tue, 28 Jan 2025 12:17:52 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 50S9U0NE001758; Tue, 28 Jan 2025 13:17:41 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= SYTacyFClbKzLmjOqzdhJPPxLmts2g5kWZai4fotd8s=; b=jED4GcJK9P2wyC1M A2P/2YnwM3GkRzhmuTEk2F8eJXiIKk9UAhvbRiZYJ36WeP762egkdZFULGkiQn+T C69UfzBKCxIn2IxnS25Oj09CWrQ1IjIOfcyuOaw2gMPoRU8x0R/lScrIHNNy3LLd hrAA5EO1vExi+rn6lFd3jJCmLHy0DnGrWIiroLKZuagcbIIRmWG1YiyOHMWkmLxi Atvp0ODXktfuiyXRR8xZZC+nbNsGNMpsUjwleVO6PHEuZRr5WcdZISee+mmqbaRx xynIRLEDYhEWzRieOJVBNcznpWLOATcKbBGx6PW90oW4rViVJuI7YxZ8YIwHTgMz cbRVDQ== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 44eudv165d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 28 Jan 2025 13:17:40 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 8F45440054; Tue, 28 Jan 2025 13:16:18 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A64DD28BE81; Tue, 28 Jan 2025 13:11:43 +0100 (CET) Received: from localhost (10.129.178.212) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 28 Jan 2025 13:11:43 +0100 From: Christian Bruel To: , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v4 10/10] arm64: dts: st: Enable PCIe on the stm32mp257f-ev1 board Date: Tue, 28 Jan 2025 13:07:45 +0100 Message-ID: <20250128120745.334377-11-christian.bruel@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128120745.334377-1-christian.bruel@foss.st.com> References: <20250128120745.334377-1-christian.bruel@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.129.178.212] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-28_04,2025-01-27_01,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250128_041751_504597_B1074097 X-CRM114-Status: UNSURE ( 9.62 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PCIe RC and EP support on stm32mp257f-ev1 board, and enable RC mode by default. Signed-off-by: Christian Bruel --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 1b88485a62a1..1a3946f47b45 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -225,6 +225,28 @@ scmi_vdd_sdcard: regulator@23 { }; }; +&pcie_ep { + pinctrl-names = "default", "init"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +&pcie_rc { + pinctrl-names = "default", "init", "sleep"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + pinctrl-2 = <&pcie_sleep_pins_a>; + wakeup-source; + status = "okay"; + + pcie@0,0 { + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a>;