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a=rsa-sha256; c=relaxed/relaxed; d=ew.tq-group.com; s=dkim; t=1738242085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XlXAWMI0jccQM6/g/C8LaMfR+EC5iEa5X2zR+R/BcUg=; b=Dp8aGpHnOwlDVpj+8nvp6MWlvkBPp+0y3Gh66FW2SuYuXbC4FX+Jar2TCn59V0XhDRA2Dh sbgvY/4L+z2s5c2q9RvwmO9bXqVQfxWvXzotg5AL6Tb+GTmevpPCrVTn7ASOg+U+pQTZ4U F3rt6JjghVsCtnjl1h37mSW+IKcXNkn5/wmXceFeeEdhWWke2oDjUqP2gm9enXUyT+TbAU hgezjjEVJljmYtPsFRAdeXX0wKF/n5T84IGO8/mo390SPZiXv5HB9Dz3M1w9B3W/QYhmhY uixvtci4mKBRqKyB1rM2u1MEYpiAgKPBo+1BktjFLsFjypl4MFIFi8y5Y+hqeg== From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Srinivas Kandagatla Cc: Alexander Stein , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] arm64: dts: imx8mn: Add access-controller references Date: Thu, 30 Jan 2025 14:01:01 +0100 Message-Id: <20250130130101.1040824-5-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250130130101.1040824-1-alexander.stein@ew.tq-group.com> References: <20250130130101.1040824-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250130_050130_508199_3888E6BC X-CRM114-Status: GOOD ( 11.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Mark ocotp as a access-controller and add references on peripherals which can be disabled (fused). Signed-off-by: Alexander Stein --- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index a5f9cfb46e5dd..b023724679b80 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "imx8mn-pinfunc.h" @@ -431,6 +432,7 @@ easrc: easrc@300c0000 { firmware-name = "imx/easrc/easrc-imx8mn.bin"; fsl,asrc-rate = <8000>; fsl,asrc-format = <2>; + access-controllers = <&ocotp IMX8MN_OCOTP_ASRC_DISABLE>; status = "disabled"; }; }; @@ -571,6 +573,7 @@ ocotp: efuse@30350000 { clocks = <&clk IMX8MN_CLK_OCOTP_ROOT>; #address-cells = <1>; #size-cells = <1>; + #access-controller-cells = <1>; /* * The register address below maps to the MX8M @@ -1053,6 +1056,7 @@ fec1: ethernet@30be0000 { nvmem-cells = <&fec_mac_address>; nvmem-cell-names = "mac-address"; fsl,stop-mode = <&gpr 0x10 3>; + access-controllers = <&ocotp IMX8MN_OCOTP_ENET_DISABLE>; status = "disabled"; }; @@ -1091,6 +1095,7 @@ mipi_dsi: dsi@32e10000 { clock-names = "bus_clk", "sclk_mipi"; interrupts = ; power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>; + access-controllers = <&ocotp IMX8MN_OCOTP_MIPI_DSI_DISABLE>; status = "disabled"; ports { @@ -1195,6 +1200,7 @@ mipi_csi: mipi-csi@32e30000 { <&clk IMX8MN_CLK_DISP_AXI_ROOT>; clock-names = "pclk", "wrap", "phy", "axi"; power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_CSI>; + access-controllers = <&ocotp IMX8MN_OCOTP_MIPI_CSI_DISABLE>; status = "disabled"; ports { @@ -1225,6 +1231,7 @@ usbotg1: usb@32e40000 { phys = <&usbphynop1>; fsl,usbmisc = <&usbmisc1 0>; power-domains = <&pgc_hsiomix>; + access-controllers = <&ocotp IMX8MN_OCOTP_USB_OTG1_DISABLE>; status = "disabled"; }; @@ -1288,6 +1295,7 @@ gpu: gpu@38000000 { <400000000>, <1200000000>; power-domains = <&pgc_gpumix>; + access-controllers = <&ocotp IMX8MN_OCOTP_GPU3D_DISABLE>; }; gic: interrupt-controller@38800000 {