From patchwork Fri Jan 31 21:46:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13955932 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90E7FC02194 for ; Fri, 31 Jan 2025 22:02:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1lm833s6WlppKgXs3wYkxJzBLYzENZ7MwTYzStfLp/Y=; b=A+NXm1b7Ic4Td9BH1Adv9HREeD Ds1Spg+m2GidLjXBAxoY4mZrMLbm+FcwIo0Om6q5hMlXJ5lDTvlwXoy6psIGtPTJGAfM7NDtqwTVb TApnzLn5wOgV8sulQPZbQJk8cn3ZyIqVnz8lJsmKI0/RCAyD34B0jqfopvvdz9WouTBBYzN9hSgyZ vtKQzlfVD7QvvX8MYRqYDhfKBdHDGaUJJt+lt1a+R+imcTYgcFT6/gGf+hZFLlrbP94grFz5RY5kI urUA7TPsQPwccIx5mOuSeFETAMSoL7OHJSlnxMnU23ly9LD3wPSpgEl6L0Ta1Su1DozmZUo1riJ3t C+lYRQMA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tdz5I-0000000BWJU-1mVS; Fri, 31 Jan 2025 22:01:56 +0000 Received: from fllvem-ot03.ext.ti.com ([198.47.19.245]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tdyq8-0000000BUaC-24gz for linux-arm-kernel@lists.infradead.org; Fri, 31 Jan 2025 21:46:19 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 50VLkC5U2548694 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 31 Jan 2025 15:46:12 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1738359972; bh=1lm833s6WlppKgXs3wYkxJzBLYzENZ7MwTYzStfLp/Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Qc8Q9bdF91VNtOgGXErYKy5/tadA0Ga0X/9L4YlzYCWXgOaAgV+bW9ZrbDNI1tmbU J8oZ090rzn9c+B7QiMUkqygydWdj6vRftpuxn1QuDtsCsFFf6D46IpsdJOhqrrga93 xWIH5hcG+cr/JPWLLHSyHtOGFX9I03HtpcBHex6E= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 50VLkCsF054209 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 31 Jan 2025 15:46:12 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 31 Jan 2025 15:46:11 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 31 Jan 2025 15:46:11 -0600 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 50VLkBCx082734; Fri, 31 Jan 2025 15:46:11 -0600 From: Judith Mendez To: Nishanth Menon , Vignesh Raghavendra CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Andrew Davis , Hari Nagalla , Judith Mendez Subject: [PATCH v2 2/9] arm64: dts: ti: k3-am62a-mcu: Add R5F remote proc node Date: Fri, 31 Jan 2025 15:46:04 -0600 Message-ID: <20250131214611.3288742-3-jm@ti.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250131214611.3288742-1-jm@ti.com> References: <20250131214611.3288742-1-jm@ti.com> MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250131_134616_644750_B7C8C330 X-CRM114-Status: GOOD ( 10.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Hari Nagalla AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU domain also has a 512KB sram memory, the R5F core can use for applications needing fast memory access. Signed-off-by: Hari Nagalla Signed-off-by: Judith Mendez --- Changes since v1: - disable each device node in the voltage domain files and enable at the board level file - fix firmware names --- arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi index 0469c766b769e..da708a0c48674 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi @@ -6,6 +6,18 @@ */ &cbass_mcu { + mcu_ram: sram@79100000 { + compatible = "mmio-sram"; + reg = <0x00 0x79100000 0x00 0x80000>; + ranges = <0x00 0x00 0x79100000 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + + mcu1-sram@0 { + reg = <0x0 0x80000>; + }; + }; + mcu_pmx0: pinctrl@4084000 { compatible = "pinctrl-single"; reg = <0x00 0x04084000 0x00 0x88>; @@ -175,4 +187,30 @@ mcu_mcan1: can@4e18000 { bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; status = "disabled"; }; + + mcu_r5fss0: r5fss@79000000 { + compatible = "ti,am62-r5fss"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x79000000 0x00 0x79000000 0x8000>, + <0x79020000 0x00 0x79020000 0x8000>; + power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>; + status = "disabled"; + + mcu_r5fss0_core0: r5f@79000000 { + compatible = "ti,am62-r5f"; + reg = <0x79000000 0x00008000>, + <0x79020000 0x00008000>; + reg-names = "atcm", "btcm"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <9>; + ti,sci-proc-ids = <0x03 0xff>; + resets = <&k3_reset 9 1>; + firmware-name = "am62a-mcu-r5f0_0-fw"; + ti,atcm-enable = <0>; + ti,btcm-enable = <1>; + ti,loczrama = <0>; + sram = <&mcu_ram>; + }; + }; };