From patchwork Mon Feb 3 18:31:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 13958059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5910C02192 for ; Mon, 3 Feb 2025 18:45:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=LKoag9c+54nBr8hdoUHJ8XU3VHyJTR39TjaDM4YVK34=; b=B8WVG77jVDxVEnKr6pcRolsALX 0ea5vE2nqhIEdqEDdj1NNkbqiHF3Ac7q3Fr1N3xugEa84GPP41m2ypcTOdxk9u41YrxgwGlChI09X MyuZkcn7nIJltXbR3jBxwJGCJsYGZ6+ym4xEgODxq6/SVAqTU6QgiSvAlDb7WsffwFJysCEanBCJu 3nuiJ4ntpp7JBqTLjtxMp0o/unyknucM0sEhIvaadyCh266ki5FTkBLjs5YQied7HBROvkqP3y59p sjEogUORfBE9Y68BHYUYXKT4VbhUEjIOtXMzQPBRLK3cMdrQaNab511W+y/ij4kw57y2iZxT30DPY 4FamrxDQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tf1RU-0000000GJKV-3i28; Mon, 03 Feb 2025 18:45:08 +0000 Received: from out-172.mta0.migadu.com ([91.218.175.172]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tf1Ev-0000000GGv5-3DiF for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 18:32:10 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1738607523; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LKoag9c+54nBr8hdoUHJ8XU3VHyJTR39TjaDM4YVK34=; b=J023LZetrpn9POuixVTXOKfMMZl421/P1IcBET4+XJGCwKJkSNWfwBVpPONX8t+8OgYW1K xwHbeOQMTY4bawwQU0pUOKrb6xP3JdpH/Dpz6Z7DwDa/448NJICLVP3CS9AHihzWrEvfmF fBHxAcXPw2UpGoNeNE0hnZC9Ul0bK4s= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: Marc Zyngier , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Mingwei Zhang , Colton Lewis , Raghavendra Rao Ananta , Catalin Marinas , Will Deacon , Mark Rutland , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Oliver Upton , Janne Grunau Subject: [PATCH v2 06/14] KVM: arm64: Remap PMUv3 events onto hardware Date: Mon, 3 Feb 2025 10:31:03 -0800 Message-Id: <20250203183111.191519-7-oliver.upton@linux.dev> In-Reply-To: <20250203183111.191519-1-oliver.upton@linux.dev> References: <20250203183111.191519-1-oliver.upton@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_103209_944612_6193E1F2 X-CRM114-Status: GOOD ( 10.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use the provided helper to map PMUv3 event IDs onto hardware, if the driver exposes such a helper. This is expected to be quite rare, and only useful for non-PMUv3 hardware. Tested-by: Janne Grunau Signed-off-by: Oliver Upton --- arch/arm64/kvm/pmu-emul.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index 62349b670cf9..60cf973e2af9 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -673,6 +673,18 @@ static bool kvm_pmc_counts_at_el2(struct kvm_pmc *pmc) return kvm_pmc_read_evtreg(pmc) & ARMV8_PMU_INCLUDE_EL2; } +static u64 kvm_map_pmu_event(struct kvm *kvm, u64 eventsel) +{ + struct arm_pmu *pmu = kvm->arch.arm_pmu; + int hw_event; + + if (!pmu->map_pmuv3_event) + return eventsel; + + hw_event = pmu->map_pmuv3_event(eventsel); + return (hw_event < 0) ? eventsel : hw_event; +} + /** * kvm_pmu_create_perf_event - create a perf event for a counter * @pmc: Counter context @@ -711,13 +723,13 @@ static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc) memset(&attr, 0, sizeof(struct perf_event_attr)); attr.type = arm_pmu->pmu.type; + attr.config = kvm_map_pmu_event(vcpu->kvm, eventsel); attr.size = sizeof(attr); attr.pinned = 1; attr.disabled = !kvm_pmu_counter_is_enabled(pmc); attr.exclude_user = !kvm_pmc_counts_at_el0(pmc); attr.exclude_hv = 1; /* Don't count EL2 events */ attr.exclude_host = 1; /* Don't count host events */ - attr.config = eventsel; /* * Filter events at EL1 (i.e. vEL2) when in a hyp context based on the