From patchwork Mon Feb 3 20:37:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaustabh Chakraborty X-Patchwork-Id: 13958190 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 52860C02192 for ; Mon, 3 Feb 2025 20:54:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9UPAq0stTvPAr+dzoUy81vyP5JY7Aw8QX2OBW61MNok=; b=1UhsmzOyD0+T4wJsrgY4j+RMDt iOkC516ILbRq2KCBeHXvJqDdgFL9WD++tlDok6psljZLNdRiIx/x3LXzIklOplRSj6az2ucJVFX4D R6vzyfhkxjpSrTZ2eVxyEk1yRXrHKrq4u3fRRC1u4bp6G7ZjwSoTDvBdoHjKf1aCwAU/WqbIjEVKv A/jX9FeyPRs2BC0vOnNMgpc5bKWvvAl299+FcqBkpM0pzV4Wevah8HUFV0pmdDQNiMDyzWFeY4Udz MnBZflJHfhfg53hI0WXetzM0a+zViawJNBsAmohdxtJ8zANYG1p0zGe/qQtmSlc5vWXpqcuImXIW/ LTOlkHAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tf3SF-0000000Gapp-0brW; Mon, 03 Feb 2025 20:54:03 +0000 Received: from layka.disroot.org ([178.21.23.139]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tf3Ct-0000000GYLf-0ua0 for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 20:38:12 +0000 Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 35F0525C7E; Mon, 3 Feb 2025 21:38:09 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id chezXAQ3N202; Mon, 3 Feb 2025 21:38:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1738615084; bh=nUxuNflbwg6A8qIs5I9HClVjufd0saQihbGMGTVz/2Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=BIp4bT/5eyM1SjA0v0Yk4s8+Jhk6NIjbLBk307ZvE+xwxF28aktW1xdDlSNMnly+s Ypqukd1+QB2PaZuw7DxyAK1sUaQggODJWRFkTdBFvdD7QLyVcQ82hBtHWjjkcBJQuQ OldOhwBsV0u8XgqajjRVc7UOtTKBD1FmVnbKqLKITNiOrbV+2CxPGBhvYeQ5euB/tO oHerq/DhDBPNHWiEeTtZCE+tBdpGpgjEEZOI16SwxD9I9X+MvfjTVOqEEa7HtWQSWG IXHRCXS0ABCPeSmXLOqra3HMIZzL50EKVyzhtEy+C8QxjqhStLTrGzt3okfELc4/lj +8JcCTVSXqCoQ== From: Kaustabh Chakraborty Date: Tue, 04 Feb 2025 02:07:30 +0530 Subject: [PATCH 2/5] dt-bindings: clock: document exynos7870 clock driver CMU bindings MIME-Version: 1.0 Message-Id: <20250204-exynos7870-pmu-clocks-v1-2-a3030ae5bb53@disroot.org> References: <20250204-exynos7870-pmu-clocks-v1-0-a3030ae5bb53@disroot.org> In-Reply-To: <20250204-exynos7870-pmu-clocks-v1-0-a3030ae5bb53@disroot.org> To: Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Tomasz Figa Cc: Sergey Lisov , linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kaustabh Chakraborty X-Developer-Signature: v=1; a=ed25519-sha256; t=1738615054; l=8151; i=kauschluss@disroot.org; s=20250202; h=from:subject:message-id; bh=nUxuNflbwg6A8qIs5I9HClVjufd0saQihbGMGTVz/2Q=; b=2MaxpSDLkpQeAnIvnSWYIITc0XUHnWq+krbHgDyHbu1IEOePgvKrNismrWuX1kxIlal6oxSgP YQbXmftjkGUCR7WSIFru/eHmFuN0T1lwCzsoLdBEgiogKiX95STqMMF X-Developer-Key: i=kauschluss@disroot.org; a=ed25519; pk=h2xeR+V2I1+GrfDPAhZa3M+NWA0Cnbdkkq1bH3ct1hE= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_123811_529398_5B6B24B3 X-CRM114-Status: GOOD ( 13.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Provide dt-schema documentation for Exynos7870 SoC clock controller. Signed-off-by: Kaustabh Chakraborty --- .../bindings/clock/samsung,exynos7870-clock.yaml | 246 +++++++++++++++++++++ 1 file changed, 246 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml new file mode 100644 index 0000000000000000000000000000000000000000..697e03ca191d685b71672d35257b022c663244ed --- /dev/null +++ b/Documentation/devicetree/bindings/clock/samsung,exynos7870-clock.yaml @@ -0,0 +1,246 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/samsung,exynos7870-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos7870 SoC clock controller + +maintainers: + - Chanwoo Choi + - Krzysztof Kozlowski + - Sylwester Nawrocki + - Tomasz Figa + +description: | + Exynos7870 clock controller is comprised of several CMU units, generating + clocks for different domains. Those CMU units are modeled as separate device + tree nodes, and might depend on each other. The root clock in that root tree + is an external clock: OSCCLK (26 MHz). This external clock must be defined + as a fixed-rate clock in dts. + + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All clocks available for usage + in clock consumer nodes are defined as preprocessor macros in + 'dt-bindings/clock/exynos7870.h' header. + +properties: + compatible: + enum: + - samsung,exynos7870-cmu-mif + - samsung,exynos7870-cmu-dispaud + - samsung,exynos7870-cmu-fsys + - samsung,exynos7870-cmu-g3d + - samsung,exynos7870-cmu-isp + - samsung,exynos7870-cmu-mfcmscl + - samsung,exynos7870-cmu-peri + + clocks: + minItems: 1 + maxItems: 10 + + clock-names: + minItems: 1 + maxItems: 10 + + "#clock-cells": + const: 1 + + reg: + maxItems: 1 + +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-cmu-mif + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + + clock-names: + items: + - const: oscclk + + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-cmu-dispaud + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_DISPAUD bus clock (from CMU_MIF) + - description: DECON external clock (from CMU_MIF) + - description: DECON vertical clock (from CMU_MIF) + + clock-names: + items: + - const: oscclk + - const: gout_mif_cmu_dispaud_bus + - const: gout_mif_cmu_dispaud_decon_eclk + - const: gout_mif_cmu_dispaud_decon_vclk + + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-cmu-fsys + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_FSYS bus clock (from CMU_MIF) + - description: USB20DRD clock (from CMU_MIF) + + clock-names: + items: + - const: oscclk + - const: gout_mif_cmu_fsys_bus + - const: gout_mif_cmu_fsys_usb20drd_refclk + + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-cmu-g3d + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: G3D switch clock (from CMU_MIF) + + clock-names: + items: + - const: oscclk + - const: gout_mif_cmu_g3d_switch + + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-cmu-isp + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: ISP camera clock (from CMU_MIF) + - description: ISP clock (from CMU_MIF) + - description: ISP VRA clock (from CMU_MIF) + + clock-names: + items: + - const: oscclk + - const: gout_mif_cmu_isp_cam + - const: gout_mif_cmu_isp_isp + - const: gout_mif_cmu_isp_vra + + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-cmu-mfcmscl + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: MSCL clock (from CMU_MIF) + - description: MFC clock (from CMU_MIF) + + clock-names: + items: + - const: oscclk + - const: gout_mif_cmu_mfcmscl_mfc + - const: gout_mif_cmu_mfcmscl_mscl + + - if: + properties: + compatible: + contains: + const: samsung,exynos7870-cmu-peri + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_PERI bus clock (from CMU_MIF) + - description: SPI0 clock (from CMU_MIF) + - description: SPI1 clock (from CMU_MIF) + - description: SPI2 clock (from CMU_MIF) + - description: SPI3 clock (from CMU_MIF) + - description: SPI4 clock (from CMU_MIF) + - description: UART0 clock (from CMU_MIF) + - description: UART1 clock (from CMU_MIF) + - description: UART2 clock (from CMU_MIF) + + clock-names: + items: + - const: oscclk + - const: gout_mif_cmu_peri_bus + - const: gout_mif_cmu_peri_spi0 + - const: gout_mif_cmu_peri_spi1 + - const: gout_mif_cmu_peri_spi2 + - const: gout_mif_cmu_peri_spi3 + - const: gout_mif_cmu_peri_spi4 + - const: gout_mif_cmu_peri_uart0 + - const: gout_mif_cmu_peri_uart1 + - const: gout_mif_cmu_peri_uart2 + +required: + - compatible + - "#clock-cells" + - clocks + - clock-names + - reg + +additionalProperties: false + +examples: + # Clock controller node for CMU_PERI + - | + #include + + cmu_peri: clock-controller@101F0000 { + compatible = "samsung,exynos7870-cmu-peri"; + reg = <0x101f0000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "gout_mif_cmu_peri_bus", + "gout_mif_cmu_peri_spi0", + "gout_mif_cmu_peri_spi1", + "gout_mif_cmu_peri_spi2", + "gout_mif_cmu_peri_spi3", + "gout_mif_cmu_peri_spi4", + "gout_mif_cmu_peri_uart0", + "gout_mif_cmu_peri_uart1", + "gout_mif_cmu_peri_uart2"; + clocks = <&oscclk>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_BUS>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI0>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI1>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI2>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI3>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI4>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART0>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART1>, + <&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART2>; + }; + +...