| Message ID | 20250214065833.530276-5-dingwei@marvell.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add Armada8K reset controller support | expand |
On Thu, Feb 13, 2025 at 10:58:32PM -0800, Wilson Ding wrote: > Add new compatible to be used for CP110's reset controller, and document > the supported reset lines. > > Signed-off-by: Wilson Ding <dingwei@marvell.com> > --- Subject: only one prefix > .../arm/marvell/cp110-system-controller.txt | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt > index 9d5d70c98058..a5cc1360969c 100644 > --- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt > +++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt > @@ -190,6 +190,38 @@ CP110_LABEL(syscon0): system-controller@440000 { > > }; > > +Reset: > +------ > + > +The Device Tree node representing this System Controller 0 provides a > +number of reset lines: > + No new bindings in TXT. Only DT schema. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt index 9d5d70c98058..a5cc1360969c 100644 --- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt @@ -190,6 +190,38 @@ CP110_LABEL(syscon0): system-controller@440000 { }; +Reset: +------ + +The Device Tree node representing this System Controller 0 provides a +number of reset lines: + +The following reset lines are available: + +- 0: Audio Software RESETn +- 1: TDM Software RESETn +- 2: Interrupt controller unit Software RESETn +- 3: Packet processor Software RESETn +- 4: SDIO Software RESETn +- 7: XOR-1 engine Software RESETn +- 8: XOR-0 engine Software RESETn +- 11: PCIe-0 Gen.3 x1 Software RESETn +- 12: PCIe-1 Gen.3 x1 Software RESETn +- 13: PCIe Gen.3 x4 Software RESETn +- 15: SATA port 0 and port 1 Software RESETn +- 22: USB3 Host 0 Software RESETn +- 23: USB3 Host 1 Software RESETn +- 24: USB3 Device Software RESETn +- 25: EIP150F Software RESETn +- 26: EIP197 Software RESETn +- 29: MSS Software RESETn + +Required properties: + + - compatible: must be: + "marvell,armada8k-reset" + - #reset-cells: must be set to 1 + SYSTEM CONTROLLER 1 ===================
Add new compatible to be used for CP110's reset controller, and document the supported reset lines. Signed-off-by: Wilson Ding <dingwei@marvell.com> --- .../arm/marvell/cp110-system-controller.txt | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+)