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[5/5] arm64: dts: ti: k3-am62a-phycore-som: Reorder properties per DTS coding style

Message ID 20250228101817.865811-5-w.egorov@phytec.de (mailing list archive)
State New
Headers show
Series [1/5] arm64: dts: ti: k3-am62x-phyboard-lyra: Add boot phase tags | expand

Commit Message

Wadim Egorov Feb. 28, 2025, 10:18 a.m. UTC 
Reorder properties to comply with the DeviceTree coding style guidelines:
https://docs.kernel.org/devicetree/bindings/dts-coding-style.html

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
---
 arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
index 1387d11f9a78..f567462ceb58 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
@@ -171,10 +171,10 @@  AM62AX_IOPAD(0x1f4, PIN_INPUT, 0) /* (D16) EXTINTn */
 };
 
 &cpsw3g {
-	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_rgmii1_pins_default>;
 	bootph-all;
+	status = "okay";
 };
 
 &cpsw_port1 {
@@ -224,8 +224,8 @@  pmic@30 {
 		interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-controller;
 		#interrupt-cells = <1>;
-		ti,power-button;
 		system-power-controller;
+		ti,power-button;
 
 		regulators {
 			vdd_3v3: buck1 {