From patchwork Sat Mar 1 10:47:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 13997464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99BABC021B8 for ; Sat, 1 Mar 2025 10:58:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=I3mjHLC2xPYx7fSMCzhjeB7YTtNlO3lgK3oyqNI4rQg=; b=PpAmA/YfRyq4/dPhzhtcG1waYu k0R8IT3XsdKJ8RbSp5vAOct9tkkIJ/TQXFdgrus4EaEhNCelLu1Xd3qBDkZzhtqQBv7GlfvAw5f6/ 2O8hcI2/6JFgsK/kLvQvynWm5HImfpewUwPZr+epw2xMw58MN6ALYlSHih+qUUM3+PWpX8sEAEN3T 41Zg0bOUNHZPgD3EUktyVPizk2QO91y7nURhA+Ufv39U89q5Bj6Ptq4SlcFTram3ZVIZqb6N2y6Gj 6YeYiG9VmvnLiS42jbsgzHJoRRsK60HKYpCHrWWelP1jarZLfT/YF87eCyR3Gv0+8ys656BCwBvAp lyeyO19A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1toKXZ-0000000DnTE-3p1G; Sat, 01 Mar 2025 10:57:53 +0000 Received: from layka.disroot.org ([178.21.23.139]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1toKOI-0000000DmXz-1L7g; Sat, 01 Mar 2025 10:48:19 +0000 Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id E125825D26; Sat, 1 Mar 2025 11:48:16 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id ABOnEt0LCSoi; Sat, 1 Mar 2025 11:48:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1740826096; bh=Mh8Scn9zD0vJo0No7F96OzW9299oqh4mWGc3Vb0A1ds=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=gGpS1Q4gvX22ZL2StQFcA9v6V4lTov4KyfGyY8SbkgC9NdvsqsBrdONuWfEsXaiPq S8SS/jgo/LMV4d4A4RxetVonl8Tc2kJyugDXHIyZKAPVm2/6Si2Ho6M+TXRySYt2lo r7JHsfKeQUHjrkfsWogYwCf2ImobHxoHgO1ePmw75ZK/5rAF/7vIYaDJWvlCVRpTMh 9haiqQkQLrVIekmf6mFYIyU09N95emzVGbUSVgjHLhVKGsjETM284kSaf+uc+j7P10 97vvttQ3TCum9mi8xTj1IbF8Dcwm6dizlP+IsWzVLSzvughY7VOkNmi5ZcEAVt1PvT A6ncQ600BvgvQ== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Frank Wang , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH 7/8] arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528 Date: Sat, 1 Mar 2025 10:47:49 +0000 Message-ID: <20250301104749.36423-1-ziyao@disroot.org> In-Reply-To: <20250301104250.36295-1-ziyao@disroot.org> References: <20250301104250.36295-1-ziyao@disroot.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250301_024818_489113_0FCABF15 X-CRM114-Status: GOOD ( 10.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RK3528 features two SDIO controllers and one SD/MMC controller, describe them in devicetree. Since their sample and drive clocks are located in the VO and VPU GRFs, corresponding syscons are added to make these clocks available. Signed-off-by: Yao Zi --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 62 ++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 5b334690356a..078c97fa1d9f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include / { compatible = "rockchip,rk3528"; @@ -122,6 +123,16 @@ gic: interrupt-controller@fed01000 { #interrupt-cells = <3>; }; + vpu_grf: syscon@ff340000 { + compatible = "rockchip,rk3528-vpu-grf", "syscon"; + reg = <0x0 0xff340000 0x0 0x8000>; + }; + + vo_grf: syscon@ff360000 { + compatible = "rockchip,rk3528-vo-grf", "syscon"; + reg = <0x0 0xff360000 0x0 0x10000>; + }; + cru: clock-controller@ff4a0000 { compatible = "rockchip,rk3528-cru"; reg = <0x0 0xff4a0000 0x0 0x30000>; @@ -251,5 +262,56 @@ uart7: serial@ffa28000 { reg-shift = <2>; status = "disabled"; }; + + sdio0: mmc@ffc10000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc10000 0x0 0x4000>; + clocks = <&cru HCLK_SDIO0>, + <&cru CCLK_SRC_SDIO0>, + <&cru SCLK_SDIO0_DRV>, + <&cru SCLK_SDIO0_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <150000000>; + resets = <&cru SRST_H_SDIO0>; + reset-names = "reset"; + status = "disabled"; + }; + + sdio1: mmc@ffc20000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc20000 0x0 0x4000>; + clocks = <&cru HCLK_SDIO1>, + <&cru CCLK_SRC_SDIO1>, + <&cru SCLK_SDIO1_DRV>, + <&cru SCLK_SDIO1_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <150000000>; + resets = <&cru SRST_H_SDIO1>; + reset-names = "reset"; + status = "disabled"; + }; + + sdmmc: mmc@ffc30000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc30000 0x0 0x4000>; + clocks = <&cru HCLK_SDMMC0>, + <&cru CCLK_SRC_SDMMC0>, + <&cru SCLK_SDMMC_DRV>, + <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <150000000>; + resets = <&cru SRST_H_SDMMC0>; + reset-names = "reset"; + status = "disabled"; + }; }; };