From patchwork Mon Mar 3 10:26:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faizal Rahim X-Patchwork-Id: 13998549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8065BC282C5 for ; Mon, 3 Mar 2025 10:35:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Nns2pb75X82OiRUnuI2QHZ6PcDEQCoIyJJLFfE3oNG0=; b=L3J1WCnWC+tU9WRyqh2FT1COZB JQLjMg9Xui7qYnqvlmDI0BN1/j0Rh97MtcIVtSkmZSEE/yIX6XK7JyxnCH3bm6vk41lJGFjpi1MO0 b9DIsqGtbyg6X/GKUgy+4yyTK1KHUBVrKvpRnDHYcuB3cQEw4or/dRCh8BfIduQUgVS5uc2Myntn7 J+8WX34RYCmNT2FuKLe/Cl0axTGQ2cEvKnzARJKPyzg3ScdHgTatWNAGS2BljkylQnJGUnuWgRylU hRTZTBINgjz4FYrI1cctGV1/halYMAqWe5ZQuMZZS+oUOiUqAnzqwEFptE4AQ0dgchu0gHGT04api s28dibzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tp395-00000000LmA-07y3; Mon, 03 Mar 2025 10:35:35 +0000 Received: from mgamail.intel.com ([198.175.65.9]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tp31l-00000000K1A-1N4Y for linux-arm-kernel@lists.infradead.org; Mon, 03 Mar 2025 10:28:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740997681; x=1772533681; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=2Msp7YoBmanu425m0MXmljH1/c1Or8M2lkzZSA8x+50=; b=Atf7+ptv8dTGijcC4Y2ByFOWVgMvl16sgYfwDZeuSpxjsGwPTAfVwEOL hAsv9w8r6qXw+A99LJQbL8U3aJx5MWhGuH+wFP+m6RicTowSZ+BuzPPBJ FHfGLgfGAsCQ2TRrEeB3O+VoAZ0M8WOdoJvT1onD3gHGydHx4s0T0LRp/ JPNolp4zpFUpbV1sVF5VnH/hoxTKJmD688FapwgWfbmwP9TgFnUDYOTyo o825lFYxO5q/7BdELdeQFWSygIJeQOJc96AMXdyqkf/WmXh+gJOeF1aaN TQJR0InVlpsg/Dn+KfSuxwoOoPn5QvTQnkhJnyPnXh2AmZ8Pv4tVzI84q A==; X-CSE-ConnectionGUID: Z+i6WYjuQVmG0Qq6fEnP1A== X-CSE-MsgGUID: Hl8ajcXERcO9IsRtKozYgA== X-IronPort-AV: E=McAfee;i="6700,10204,11361"; a="64310157" X-IronPort-AV: E=Sophos;i="6.13,329,1732608000"; d="scan'208";a="64310157" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2025 02:28:00 -0800 X-CSE-ConnectionGUID: t9zZnSvsR46o8m5nS2uR3g== X-CSE-MsgGUID: DkMFzS4QTBm8OGTiacD7eQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,329,1732608000"; d="scan'208";a="122569880" Received: from mohdfai2-ilbpg12-1.png.intel.com ([10.88.227.73]) by fmviesa005.fm.intel.com with ESMTP; 03 Mar 2025 02:27:53 -0800 From: Faizal Rahim To: Tony Nguyen , Przemek Kitszel , Andrew Lunn , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Simon Horman , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Furong Xu <0x1207@gmail.com>, Russell King , Vladimir Oltean , Serge Semin , Xiaolei Wang , Suraj Jaiswal , Kory Maincent , Gal Pressman , Jesper Nilsson , Andrew Halaney , Choong Yong Liang , Faizal Rahim , Kunihiko Hayashi , Vinicius Costa Gomes , intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, bpf@vger.kernel.org Subject: [PATCH iwl-next v7 4/9] igc: Set the RX packet buffer size for TSN mode Date: Mon, 3 Mar 2025 05:26:53 -0500 Message-Id: <20250303102658.3580232-5-faizal.abdul.rahim@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250303102658.3580232-1-faizal.abdul.rahim@linux.intel.com> References: <20250303102658.3580232-1-faizal.abdul.rahim@linux.intel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_022801_423893_4DB3F4AE X-CRM114-Status: GOOD ( 12.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Co-developed-by: Vinicius Costa Gomes Signed-off-by: Vinicius Costa Gomes Signed-off-by: Faizal Rahim --- drivers/net/ethernet/intel/igc/igc_defines.h | 3 +++ drivers/net/ethernet/intel/igc/igc_tsn.c | 13 +++++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 516ef70c98e9..b19ac6f30dac 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -402,6 +402,9 @@ /* 7KB bytes buffer for each tx queue (total 4 queues) + 4KB for BMC*/ #define IGC_TXPBSIZE_TSN 0x041c71c7 +/* 15KB for EXP + 15KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_TSN 0x0000f08f +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 1e44374ca1ff..f0213cfce07d 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -132,13 +132,17 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter) { u16 queue_per_tc[4] = { 3, 2, 1, 0 }; struct igc_hw *hw = &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; wr32(IGC_GTXOFFSET, 0); wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= I225_RXPBSIZE_DEFAULT; + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_restore_retx_default(adapter); @@ -194,7 +198,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; @@ -202,6 +206,11 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN); wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= IGC_RXPBSIZE_TSN; + + wr32(IGC_RXPBS, rxpbs); + if (igc_is_device_id_i226(hw)) igc_tsn_set_retx_qbvfullthreshold(adapter);