| Message ID | 20250303170012.469576-1-hugues.kambampiana@arm.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] arm64: dts: corstone1000: Add definitions for secondary CPU cores | expand |
diff --git a/arch/arm64/boot/dts/arm/corstone1000-fvp.dts b/arch/arm64/boot/dts/arm/corstone1000-fvp.dts index abd013562995..df9700302b8d 100644 --- a/arch/arm64/boot/dts/arm/corstone1000-fvp.dts +++ b/arch/arm64/boot/dts/arm/corstone1000-fvp.dts @@ -49,3 +49,27 @@ sdmmc1: mmc@50000000 { clock-names = "smclk", "apb_pclk"; }; }; + +&cpus { + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x1>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x2>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x3>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; +}; diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi index bb9b96fb5314..b4364c61901c 100644 --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi @@ -21,7 +21,7 @@ chosen { stdout-path = "serial0:115200n8"; }; - cpus { + cpus: cpus { #address-cells = <1>; #size-cells = <0>;
Add `cpu1`, `cpu2` and `cpu3` nodes to the Corstone1000 device tree to enable support for secondary CPU cores. This update facilitates symmetric multiprocessing (SMP) support on the Corstone1000 Fixed Virtual Platform (FVP), allowing the secondary cores to be properly initialised and utilised. Only FVP platform will have SMP support and hence the secondary cpu definitions are not added to corstone1000.dtsi. Signed-off-by: Hugues KAMBA MPIANA <hugues.kambampiana@arm.com> --- arch/arm64/boot/dts/arm/corstone1000-fvp.dts | 24 ++++++++++++++++++++ arch/arm64/boot/dts/arm/corstone1000.dtsi | 2 +- 2 files changed, 25 insertions(+), 1 deletion(-)