From patchwork Tue Mar 4 17:32:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 14001320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DBC43C021B8 for ; Tue, 4 Mar 2025 19:19:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=SYDQ2e7rPLq6jnzS+WCda4pi4joDoEM4IJKfErHVT40=; b=qX2YIqs060uN1MUgXMNluiBbfG cI7nqOKIoUjmeaZIRq8tsCOJVXaDH4vw/k1ft6TEX4no0951MDT/6/vP3uaG4Zj5WhX7Ninu9TDkW uEq1sfymUGu7CvxcOTzVSpXqO7Dc9FVsZFooee1g5E22PNpi3MUxbt1YjNKKjS60m1kNFeIdw9DVE oX5Pc69Z8td7ZICHzAIa0rfd7cV2fYQLpyHtIDXAVMVbhDuzmccCPbha5MGxvrB5QlogpItMLklIP KTIZ4DC/u7fRwxtESlmCczxD/7SM0i6Intuxn0lESCcN2SV5btWlyxUxzxVg1xDDMGDPHft4gKuIM Sh2Ue/OQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tpXnJ-00000005zeE-3gvx; Tue, 04 Mar 2025 19:19:09 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tpWFn-00000005g0o-1pBm for linux-arm-kernel@lists.infradead.org; Tue, 04 Mar 2025 17:40:28 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 524Hbr1x027811; Tue, 4 Mar 2025 18:40:10 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= SYDQ2e7rPLq6jnzS+WCda4pi4joDoEM4IJKfErHVT40=; b=Pl2XyXfYPuIDqyM9 K9VLHLbjIi0Y+toylx1CnELzpUmMMaLICLWC24dOJoJHJhXJhOcP5HIxVzGXC76u swyQ0W61IKsc1betxIFQXEdTyp0XbTn92r/fKe6NYIznjjUFaVxVSxSA6otD7hNO FsWyrF6TvtMgRVumYPtpOeFX0iV81vEVbLo2PL+nMKWSIIaieJwL7o5hjI6Hzy8O 8AOyaH/gbgu4abhFcBALekNdCKOA6Ppuz3yschh6shFRmZqge2r2V4CIV1ovKRx7 qO2OAyYP6u0OMiojL845ZJK9lA9BlVKQ5eKLuHlqCKlbpEz4npaA/vL6xBaRNH2b 5Wz3Qg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 454cp8fgdf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 04 Mar 2025 18:40:09 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 90B20400B0; Tue, 4 Mar 2025 18:39:00 +0100 (CET) Received: from Webmail-eu.st.com (eqndag1node4.st.com [10.75.129.133]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D6B1B5944D6; Tue, 4 Mar 2025 18:32:46 +0100 (CET) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE4.st.com (10.75.129.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 4 Mar 2025 18:32:46 +0100 Received: from localhost (10.252.16.143) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 4 Mar 2025 18:32:46 +0100 From: Fabrice Gasnier To: , , , , , , , , CC: , , , , , , , , , , Subject: [PATCH v2 1/8] dt-bindings: mfd: stm32-lptimer: add support for stm32mp25 Date: Tue, 4 Mar 2025 18:32:22 +0100 Message-ID: <20250304173229.3215445-2-fabrice.gasnier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250304173229.3215445-1-fabrice.gasnier@foss.st.com> References: <20250304173229.3215445-1-fabrice.gasnier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.16.143] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-04_07,2025-03-03_04,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250304_094027_772874_34D2F604 X-CRM114-Status: GOOD ( 12.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a new stm32mp25 compatible to stm32-lptimer dt-bindings, to support STM32MP25 SoC. Some features has been updated or added to the low-power timer: - new capture compare channels - up to two PWM channels - PWM input capture - peripheral interconnect in stm32mp25 has been updated (new triggers). - registers/bits has been added or revisited (IER access). So introduce a new compatible to handle this diversity. Signed-off-by: Fabrice Gasnier --- Changes in V2: - Use fallback compatibles, along with stm32mp25 specific compatible - trigger identifier can be up to 4 (e.g. from LPTIM1..5) --- .../bindings/mfd/st,stm32-lptimer.yaml | 40 ++++++++++++++++--- 1 file changed, 34 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml index d41308856408..ca251994cda2 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -21,7 +21,12 @@ maintainers: properties: compatible: - const: st,stm32-lptimer + oneOf: + - items: + - const: st,stm32mp25-lptimer + - const: st,stm32-lptimer + - items: + - const: st,stm32-lptimer reg: maxItems: 1 @@ -48,13 +53,21 @@ properties: minItems: 1 maxItems: 2 + power-domains: + maxItems: 1 + pwm: type: object additionalProperties: false properties: compatible: - const: st,stm32-pwm-lp + oneOf: + - items: + - const: st,stm32mp25-pwm-lp + - const: st,stm32-pwm-lp + - items: + - const: st,stm32-pwm-lp "#pwm-cells": const: 3 @@ -69,7 +82,12 @@ properties: properties: compatible: - const: st,stm32-lptimer-counter + oneOf: + - items: + - const: st,stm32mp25-lptimer-counter + - const: st,stm32-lptimer-counter + - items: + - const: st,stm32-lptimer-counter required: - compatible @@ -80,7 +98,12 @@ properties: properties: compatible: - const: st,stm32-lptimer-timer + oneOf: + - items: + - const: st,stm32mp25-lptimer-timer + - const: st,stm32-lptimer-timer + - items: + - const: st,stm32-lptimer-timer required: - compatible @@ -92,13 +115,18 @@ patternProperties: properties: compatible: - const: st,stm32-lptimer-trigger + oneOf: + - items: + - const: st,stm32mp25-lptimer-trigger + - const: st,stm32-lptimer-trigger + - items: + - const: st,stm32-lptimer-trigger reg: description: Identify trigger hardware block. items: minimum: 0 - maximum: 2 + maximum: 4 required: - compatible