| Message ID | 20250310093708.9332-1-leo.yan@arm.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: hi3660: Add property for fixing CPUIdle | expand |
On 10/03/2025 9:37 am, Leo Yan wrote: > During CPU low power modes, ETM components will lose their context. Add > the "arm,coresight-loses-context-with-cpu" property to ETM nodes to save > and restore ETM context for CPU idle states. > > Signed-off-by: Leo Yan <leo.yan@arm.com> > --- > arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > index 79a55a0fa2f1..4c6a075908d1 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > @@ -17,6 +17,7 @@ etm@ecc40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu0>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -34,6 +35,7 @@ etm@ecd40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu1>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -51,6 +53,7 @@ etm@ece40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu2>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -68,6 +71,7 @@ etm@ecf40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu3>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -160,6 +164,7 @@ etm@ed440000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu4>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -177,6 +182,7 @@ etm@ed540000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu5>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -194,6 +200,7 @@ etm@ed640000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu6>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -211,6 +218,7 @@ etm@ed740000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu7>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { Reviewed-by: James Clark <james.clark@linaro.org>
Hi Leo, On 2025/3/10 17:37, Leo Yan wrote: > During CPU low power modes, ETM components will lose their context. Add > the "arm,coresight-loses-context-with-cpu" property to ETM nodes to save > and restore ETM context for CPU idle states. > > Signed-off-by: Leo Yan <leo.yan@arm.com> > --- Applied to the HiSilicon arm64 dt tree. Thanks! Best Regards, Wei > arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > index 79a55a0fa2f1..4c6a075908d1 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi > @@ -17,6 +17,7 @@ etm@ecc40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu0>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -34,6 +35,7 @@ etm@ecd40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu1>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -51,6 +53,7 @@ etm@ece40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu2>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -68,6 +71,7 @@ etm@ecf40000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu3>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -160,6 +164,7 @@ etm@ed440000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu4>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -177,6 +182,7 @@ etm@ed540000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu5>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -194,6 +200,7 @@ etm@ed640000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu6>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -211,6 +218,7 @@ etm@ed740000 { > clocks = <&crg_ctrl HI3660_PCLK>; > clock-names = "apb_pclk"; > cpu = <&cpu7>; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { >
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi index 79a55a0fa2f1..4c6a075908d1 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi @@ -17,6 +17,7 @@ etm@ecc40000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu0>; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -34,6 +35,7 @@ etm@ecd40000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu1>; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -51,6 +53,7 @@ etm@ece40000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu2>; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -68,6 +71,7 @@ etm@ecf40000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu3>; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -160,6 +164,7 @@ etm@ed440000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu4>; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -177,6 +182,7 @@ etm@ed540000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu5>; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -194,6 +200,7 @@ etm@ed640000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu6>; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -211,6 +218,7 @@ etm@ed740000 { clocks = <&crg_ctrl HI3660_PCLK>; clock-names = "apb_pclk"; cpu = <&cpu7>; + arm,coresight-loses-context-with-cpu; out-ports { port {
During CPU low power modes, ETM components will lose their context. Add the "arm,coresight-loses-context-with-cpu" property to ETM nodes to save and restore ETM context for CPU idle states. Signed-off-by: Leo Yan <leo.yan@arm.com> --- arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)