diff mbox series

[1/3] arm64: dts: rockchip: Add missing uart3 interrupt for RK3528

Message ID 20250318100010.2253408-2-amadeus@jmu.edu.cn (mailing list archive)
State New
Headers show
Series arm64: dts: rockchip: Add DMA controller for RK3528 | expand

Commit Message

Chukun Pan March 18, 2025, 10 a.m. UTC
The interrupt of uart3 node on rk3528 is missing, fix it.

Fixes: 7983e6c379a9 ("arm64: dts: rockchip: Add base DT for rk3528 SoC")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
---
 arch/arm64/boot/dts/rockchip/rk3528.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Yao Zi March 18, 2025, 12:12 p.m. UTC | #1
On Tue, Mar 18, 2025 at 06:00:08PM +0800, Chukun Pan wrote:
> The interrupt of uart3 node on rk3528 is missing, fix it.
> 
> Fixes: 7983e6c379a9 ("arm64: dts: rockchip: Add base DT for rk3528 SoC")
> Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>

Reviewed-by: Yao Zi <ziyao@disroot.org>

Thanks for catching this, seems I messed uart3 up when cleaning the
devicetree.

> ---
>  arch/arm64/boot/dts/rockchip/rk3528.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> index 26c3559d6a6d..7f1ffd6003f5 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> @@ -404,9 +404,10 @@ uart2: serial@ffa00000 {
>  
>  		uart3: serial@ffa08000 {
>  			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
> +			reg = <0x0 0xffa08000 0x0 0x100>;
>  			clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
>  			clock-names = "baudclk", "apb_pclk";
> -			reg = <0x0 0xffa08000 0x0 0x100>;
> +			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
>  			reg-io-width = <4>;
>  			reg-shift = <2>;
>  			status = "disabled";
> -- 
> 2.25.1
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 26c3559d6a6d..7f1ffd6003f5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -404,9 +404,10 @@  uart2: serial@ffa00000 {
 
 		uart3: serial@ffa08000 {
 			compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
+			reg = <0x0 0xffa08000 0x0 0x100>;
 			clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
 			clock-names = "baudclk", "apb_pclk";
-			reg = <0x0 0xffa08000 0x0 0x100>;
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 			reg-io-width = <4>;
 			reg-shift = <2>;
 			status = "disabled";