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bh=i7neHX6pVAvXdKm3a/XywrG4UxQambvNuDibGppmsLA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=C7chgjGBObsEy1tdX81nPShppzFJKmCkvz4Ouuv3RW3fj1S0ZVx5K4n4HDrGmiWOy Fflx611ZGq7v7RBBM5YPzgnRq+s5SPo4kLVTYouUYHHuJWE3uiEARXH69kIBAuJw6U qcYFJuiqbnEaQOhvqSm6ESXFPTidTGLu+Sya+KHPbGDSgu3F9gsSwJxXYWheK7vqzH 9f1w+HsEQxJxNwQJxRNnZFmaSgdMAeloED+BhJc54BfeX/Chmripg27THieyJQpIC0 xSnAzTwTlDFceojIWuLo05lb70Epz/TR0vjr/10667scA3QS0S/touASs3AeBsRAPI n6LT1Yx3aOPHw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB447C3600C; Tue, 25 Mar 2025 16:00:48 +0000 (UTC) Date: Wed, 26 Mar 2025 00:59:59 +0900 Subject: [PATCH v8 4/6] drm/i915: Convert REG_GENMASK*() to fixed-width GENMASK_U*() MIME-Version: 1.0 Message-Id: <20250326-fixed-type-genmasks-v8-4-24afed16ca00@wanadoo.fr> References: <20250326-fixed-type-genmasks-v8-0-24afed16ca00@wanadoo.fr> In-Reply-To: <20250326-fixed-type-genmasks-v8-0-24afed16ca00@wanadoo.fr> To: Yury Norov , Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton Cc: linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Andy Shevchenko , Catalin Marinas , Anshuman Khandual , linux-arm-kernel@lists.infradead.org, Jani Nikula , Vincent Mailhol X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5740; i=mailhol.vincent@wanadoo.fr; h=from:subject:message-id; bh=1ou22BtqXrIJAaAiPkSG694MjDxDXtsfNMr9EFCnSzs=; b=owGbwMvMwCV2McXO4Xp97WbG02pJDOmPLqtfykv8x2G4K39lrNPn+haX/mJeHdOUXdpfTCId1 q06cupPRykLgxgXg6yYIsuyck5uhY5C77BDfy1h5rAygQxh4OIUgIloejEy3BSpUn6ttPkIw6qp 12Qs004ErJ0k3q1Vlip2qYtJ4SbzfUaGlTlZaxMzTm9vzn78w9Ztw/zCzSxbWbIKfio9miVQPPs xAwA= X-Developer-Key: i=mailhol.vincent@wanadoo.fr; a=openpgp; fpr=ED8F700574E67F20E574E8E2AB5FEB886DBB99C2 X-Endpoint-Received: by B4 Relay for mailhol.vincent@wanadoo.fr/default with auth_id=291 X-Original-From: Vincent Mailhol X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250325_160053_083707_DFBE90BF X-CRM114-Status: GOOD ( 13.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: mailhol.vincent@wanadoo.fr Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Vincent Mailhol From: Lucas De Marchi Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use them to implement the i915/xe specific macros. Converting each driver to use the generic macros are left for later, when/if other driver-specific macros are also generalized. Signed-off-by: Lucas De Marchi Acked-by: Jani Nikula Signed-off-by: Vincent Mailhol --- Changelog: v7 -> v8: - No changes. v6 -> v7: - Replace BIT_* and GENMASK_* by BIT_U*() and GENMASK_U*() in the description. - Add the information in the description that BIT_U*() and GENMASK_U*() are fixed width. v5 -> v6: - No changes. v4 -> v5: - Add brackets to macro names in patch description, e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()' v3 -> v4: - Remove the prefixes in macro parameters, e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)' --- drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++------------------------------- 1 file changed, 11 insertions(+), 97 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h index e251bcc0c89f5710125bc70f07851b2cb978c89c..e0bc9cf5fa9ed98f7d36f6cb667999aa6522c384 100644 --- a/drivers/gpu/drm/i915/i915_reg_defs.h +++ b/drivers/gpu/drm/i915/i915_reg_defs.h @@ -9,76 +9,19 @@ #include #include -/** - * REG_BIT() - Prepare a u32 bit value - * @__n: 0-based bit number - * - * Local wrapper for BIT() to force u32, with compile time checks. - * - * @return: Value with bit @__n set. +/* + * Wrappers over the generic fixed width BIT_U*() and GENMASK_U*() + * implementations, for compatibility reasons with previous implementation. */ -#define REG_BIT(__n) \ - ((u32)(BIT(__n) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ - ((__n) < 0 || (__n) > 31)))) +#define REG_GENMASK(high, low) GENMASK_U32(high, low) +#define REG_GENMASK64(high, low) GENMASK_U64(high, low) +#define REG_GENMASK16(high, low) GENMASK_U16(high, low) +#define REG_GENMASK8(high, low) GENMASK_U8(high, low) -/** - * REG_BIT8() - Prepare a u8 bit value - * @__n: 0-based bit number - * - * Local wrapper for BIT() to force u8, with compile time checks. - * - * @return: Value with bit @__n set. - */ -#define REG_BIT8(__n) \ - ((u8)(BIT(__n) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ - ((__n) < 0 || (__n) > 7)))) - -/** - * REG_GENMASK() - Prepare a continuous u32 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK() to force u32, with compile time checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK(__high, __low) \ - ((u32)(GENMASK(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 31 || (__low) > (__high))))) - -/** - * REG_GENMASK64() - Prepare a continuous u64 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK_ULL() to force u64, with compile time checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK64(__high, __low) \ - ((u64)(GENMASK_ULL(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 63 || (__low) > (__high))))) - -/** - * REG_GENMASK8() - Prepare a continuous u8 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK() to force u8, with compile time checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK8(__high, __low) \ - ((u8)(GENMASK(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 7 || (__low) > (__high))))) +#define REG_BIT(n) BIT_U32(n) +#define REG_BIT64(n) BIT_U64(n) +#define REG_BIT16(n) BIT_U16(n) +#define REG_BIT8(n) BIT_U8(n) /* * Local integer constant expression version of is_power_of_2(). @@ -143,35 +86,6 @@ */ #define REG_FIELD_GET64(__mask, __val) ((u64)FIELD_GET(__mask, __val)) -/** - * REG_BIT16() - Prepare a u16 bit value - * @__n: 0-based bit number - * - * Local wrapper for BIT() to force u16, with compile time - * checks. - * - * @return: Value with bit @__n set. - */ -#define REG_BIT16(__n) \ - ((u16)(BIT(__n) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ - ((__n) < 0 || (__n) > 15)))) - -/** - * REG_GENMASK16() - Prepare a continuous u8 bitmask - * @__high: 0-based high bit - * @__low: 0-based low bit - * - * Local wrapper for GENMASK() to force u16, with compile time - * checks. - * - * @return: Continuous bitmask from @__high to @__low, inclusive. - */ -#define REG_GENMASK16(__high, __low) \ - ((u16)(GENMASK(__high, __low) + \ - BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \ - __is_constexpr(__low) && \ - ((__low) < 0 || (__high) > 15 || (__low) > (__high))))) /** * REG_FIELD_PREP16() - Prepare a u16 bitfield value