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EdgeLock Enclave has a hardware limitation of restricted access to DDR address: 0x80000000 to 0xafffffff, so reserve 1MB of DDR memory region from 0x80000000. Signed-off-by: Pankaj Gupta --- changes from v13 to v14 - added the blank line. - removed the lines: #address-cells = <1>; , #size-cells = <0>; - moved the ele-reserved under the parent node "reserved-memory". - rename the node name "ele-reserved" to general name "memory". --- arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 12 +++++++++++- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++-- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts index 290a49bea2f7..10aaf02f8ea7 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ /dts-v1/; @@ -37,6 +37,12 @@ linux,cma { linux,cma-default; }; + ele_reserved: memory@90000000 { + compatible = "shared-dma-pool"; + reg = <0 0x90000000 0 0x100000>; + no-map; + }; + m33_reserved: noncacheable-section@a8600000 { reg = <0 0xa8600000 0 0x1000000>; no-map; @@ -259,6 +265,10 @@ &usdhc0 { status = "okay"; }; +&hsm0 { + memory-region = <&ele_reserved>; +}; + &fec { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_enet>; diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 2562a35286c2..05db47668b7e 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ #include @@ -154,7 +154,7 @@ sosc: clock-sosc { #clock-cells = <0>; }; - sram@2201f000 { + sram0: sram@2201f000 { compatible = "mmio-sram"; reg = <0x0 0x2201f000 0x0 0x1000>; @@ -186,6 +186,13 @@ scmi_sensor: protocol@15 { #thermal-sensor-cells = <1>; }; }; + + hsm0: secure-enclave { + compatible = "fsl,imx8ulp-se-ele-hsm"; + mbox-names = "tx", "rx"; + mboxes = <&s4muap 0 0>, <&s4muap 1 0>; + sram = <&sram0>; + }; }; cm33: remoteproc-cm33 {