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Fri, 28 Mar 2025 03:59:33 -0700 (PDT) From: Jensen Huang To: Shawn Lin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , Anand Moon Cc: Jensen Huang , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] PCI: rockchip: Fix order of rockchip_pci_core_rsts Date: Fri, 28 Mar 2025 18:58:22 +0800 Message-ID: <20250328105822.3946767-1-jensenhuang@friendlyarm.com> X-Mailer: git-send-email 2.49.0-1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250328_035935_474966_C5BEA8C7 X-CRM114-Status: GOOD ( 12.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The order of rockchip_pci_core_rsts follows the previous comments suggesting to avoid reordering. However, reset_control_bulk_deassert() applies resets in reverse, which may lead to the link downgrading to 2.5 GT/s. This patch restores the deassert order and comments for core_rsts, introduced in commit 58c6990c5ee7 ("PCI: rockchip: Improve the deassert sequence of four reset pins"). Tested on NanoPC-T4 with Samsung 970 Pro. Fixes: 18715931a5c0 ("PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function") Signed-off-by: Jensen Huang --- drivers/pci/controller/pcie-rockchip.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 11def598534b..4f63a03d535c 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -320,11 +320,15 @@ static const char * const rockchip_pci_pm_rsts[] = { "aclk", }; +/* + * Please don't reorder the deassert sequence of the following + * four reset pins. + */ static const char * const rockchip_pci_core_rsts[] = { - "mgmt-sticky", - "core", - "mgmt", "pipe", + "mgmt", + "core", + "mgmt-sticky", }; struct rockchip_pcie {