| Message ID | 20250401154404.45932-6-laurentiumihalcea111@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | imx8mp: add support for the IMX AIPSTZ bridge | expand |
On Tue, Apr 01, 2025 at 11:44:03AM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > Add header file with master ID definitions for i.MX8MP's AIPSTZ. > > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx8mp-aipstz.h | 25 +++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 + > 2 files changed, 26 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-aipstz.h > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h b/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h > new file mode 100644 > index 000000000000..23725cdef23b > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h > @@ -0,0 +1,25 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ > +/* > + * Copyright 2025 NXP > + */ > + > +#ifndef __IMX8MP_AIPSTZ_H > +#define __IMX8MP_AIPSTZ_H > + > +#include <dt-bindings/bus/imx-aipstz.h> > + > +/* master ID definitions */ > +#define IMX8MP_AIPSTZ_EDMA 0 /* AUDIOMIX EDMA */ > +#define IMX8MP_AIPSTZ_CA53 1 /* Cortex-A53 cluster */ > +#define IMX8MP_AIPSTZ_SDMA2 3 /* AUDIOMIX SDMA2 */ > +#define IMX8MP_AIPSTZ_SDMA3 3 /* AUDIOMIX SDMA3 */ > +#define IMX8MP_AIPSTZ_HIFI4 5 /* HIFI4 DSP */ > +#define IMX8MP_AIPSTZ_CM7 6 /* Cortex-M7 */ > + > +/* helper macros */ > +#define IMX8MP_AIPSTZ_HIFI4_T_RW_PL \ > + IMX_AIPSTZ_MASTER \ > + IMX8MP_AIPSTZ_HIFI4 \ > + (IMX_AIPSTZ_MPL | IMX_AIPSTZ_MTW | IMX_AIPSTZ_MTR) > + > +#endif /* __IMX8MP_AIPSTZ_H */ > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index aa7940c65f2d..ebbc99f9ceba 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -12,6 +12,7 @@ > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/thermal/thermal.h> > > +#include "imx8mp-aipstz.h" > #include "imx8mp-pinfunc.h" > > / { > -- > 2.34.1 >
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h b/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h new file mode 100644 index 000000000000..23725cdef23b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ +/* + * Copyright 2025 NXP + */ + +#ifndef __IMX8MP_AIPSTZ_H +#define __IMX8MP_AIPSTZ_H + +#include <dt-bindings/bus/imx-aipstz.h> + +/* master ID definitions */ +#define IMX8MP_AIPSTZ_EDMA 0 /* AUDIOMIX EDMA */ +#define IMX8MP_AIPSTZ_CA53 1 /* Cortex-A53 cluster */ +#define IMX8MP_AIPSTZ_SDMA2 3 /* AUDIOMIX SDMA2 */ +#define IMX8MP_AIPSTZ_SDMA3 3 /* AUDIOMIX SDMA3 */ +#define IMX8MP_AIPSTZ_HIFI4 5 /* HIFI4 DSP */ +#define IMX8MP_AIPSTZ_CM7 6 /* Cortex-M7 */ + +/* helper macros */ +#define IMX8MP_AIPSTZ_HIFI4_T_RW_PL \ + IMX_AIPSTZ_MASTER \ + IMX8MP_AIPSTZ_HIFI4 \ + (IMX_AIPSTZ_MPL | IMX_AIPSTZ_MTW | IMX_AIPSTZ_MTR) + +#endif /* __IMX8MP_AIPSTZ_H */ diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index aa7940c65f2d..ebbc99f9ceba 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -12,6 +12,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> +#include "imx8mp-aipstz.h" #include "imx8mp-pinfunc.h" / {