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Wed, 02 Apr 2025 12:22:58 -0700 (PDT) Received: from localhost ([2a03:2880:30ff:71::]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5edc16f213dsm8949262a12.44.2025.04.02.12.22.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Apr 2025 12:22:57 -0700 (PDT) From: Breno Leitao Date: Wed, 02 Apr 2025 12:22:47 -0700 Subject: [PATCH RFC] arm64: vdso: Use __arch_counter_get_cntvct() MIME-Version: 1.0 Message-Id: <20250402-arm-vdso-v1-1-2e7a12d75107@debian.org> X-B4-Tracking: v=1; b=H4sIAIaO7WcC/x3MOwqAMBAFwKssrzawRi1MK3gAW7HQuOoWfkggC OLdBecA8yBKUIlw9CBI0qjnAUd5RvDbeKxidIYjWLYVl2zNGHaT5ngaX07s66WoCmZkhCvIovd f9ejaBsP7ftQLfo1fAAAA X-Change-ID: 20250402-arm-vdso-c4b0c9f35300 To: Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, arnd@arndb.de, kernel-team@meta.com, vincenzo.frascino@arm.com, maz@kernel.org, anders.roxell@linaro.org, Breno Leitao X-Mailer: b4 0.15-dev-42535 X-Developer-Signature: v=1; a=openpgp-sha256; l=2668; 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fpr=AC8539A6E8F46702CA4A439B35A3939FFC78776D X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250402_122301_315571_A2F6374B X-CRM114-Status: GOOD ( 16.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org While reading how `cntvct_el0` was read in the kernel, I found that __arch_get_hw_counter() is doing something very similar to what __arch_counter_get_cntvct() is already doing. Use the existing __arch_counter_get_cntvct() function instead of duplicating similar inline assembly code in __arch_get_hw_counter(). Both functions were performing nearly identical operations to read the cntvct_el0 register. The only difference was that __arch_get_hw_counter() included a memory clobber in its inline assembly, which appears unnecessary in this context. This change simplifies the code by eliminating duplicate functionality and improves maintainability by centralizing the counter access logic in a single implementation. Signed-off-by: Breno Leitao --- I'm sharing this code as an RFC since I'm not intimately familiar with different arm platforms, and I want to double-check that I haven't missed anything subtle. --- arch/arm64/include/asm/vdso/gettimeofday.h | 22 ++-------------------- 1 file changed, 2 insertions(+), 20 deletions(-) --- base-commit: acc4d5ff0b61eb1715c498b6536c38c1feb7f3c1 change-id: 20250402-arm-vdso-c4b0c9f35300 Best regards, diff --git a/arch/arm64/include/asm/vdso/gettimeofday.h b/arch/arm64/include/asm/vdso/gettimeofday.h index 92a2b59a9f3df..417b5b41b877d 100644 --- a/arch/arm64/include/asm/vdso/gettimeofday.h +++ b/arch/arm64/include/asm/vdso/gettimeofday.h @@ -11,6 +11,7 @@ #include #include #include +#include #define VDSO_HAS_CLOCK_GETRES 1 @@ -69,8 +70,6 @@ int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) static __always_inline u64 __arch_get_hw_counter(s32 clock_mode, const struct vdso_time_data *vd) { - u64 res; - /* * Core checks for mode already, so this raced against a concurrent * update. Return something. Core will do another round and then @@ -79,24 +78,7 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode, if (clock_mode == VDSO_CLOCKMODE_NONE) return 0; - /* - * If FEAT_ECV is available, use the self-synchronizing counter. - * Otherwise the isb is required to prevent that the counter value - * is speculated. - */ - asm volatile( - ALTERNATIVE("isb\n" - "mrs %0, cntvct_el0", - "nop\n" - __mrs_s("%0", SYS_CNTVCTSS_EL0), - ARM64_HAS_ECV) - : "=r" (res) - : - : "memory"); - - arch_counter_enforce_ordering(res); - - return res; + return __arch_counter_get_cntvct(); } #endif /* !__ASSEMBLY__ */