@@ -56,6 +56,13 @@ properties:
NOTE: this only applies to the SMMU itself, not masters connected
upstream of the SMMU.
+ arm,smmu-faulty-msi-iova:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Specifies a faulty PCI MSI base I/O Virtual Address. If this is passed
+ via dts then arm SMMU driver appropriately select suitable MSI_IOVA base
+ which does not intersect with faulty MSI IOVA passed in this dts property.
+
msi-parent: true
hisilicon,broken-prefetch-cmd:
@@ -92,4 +99,5 @@ examples:
dma-coherent;
#iommu-cells = <1>;
msi-parent = <&its 0xff0000>;
+ arm,smmu-faulty-msi-iova = <0x8000000>;
};
@@ -208,6 +208,13 @@ properties:
NOTE: this only applies to the SMMU itself, not masters connected
upstream of the SMMU.
+ arm,smmu-faulty-msi-iova:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Specifies a faulty PCI MSI base I/O Virtual Address. If this is passed
+ via dts then ARM SMMU driver appropriately select suitable MSI_IOVA base
+ which does not intersect with faulty MSI IOVA passed in this dts property.
+
calxeda,smmu-secure-config-access:
type: boolean
description:
@@ -680,6 +687,7 @@ examples:
#iommu-cells = <1>;
/* always ignore appended 5-bit TBU number */
stream-match-mask = <0x7c00>;
+ arm,smmu-faulty-msi-iova = <0x8000000>;
};
bus {
By default ARM SMMU drivers use MSI_IOVA_BASE macro to reserve PCI MSI IOVA memory range, this assumes that all the platforms have MSI_IOVA_BASE address available for MSI reservation. However, this is not always the case, as some platforms may have the default address reserved for some other purposes and as a consequence ARM SMMU drivers can't reserve MSI memory for those platforms. To address this issue, add a new dts property "arm,smmu-faulty-msi-iova" which can be used to hold faulty MSI IOVA address. This property can be passed to ARM SMMU drivers via device tree so that the drivers can select appropriate MSI IOVA base address which doesn't intersect with the faulty MSI IOVA address. Signed-off-by: Shyam Saini <shyamsaini@linux.microsoft.com> --- Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml | 8 ++++++++ Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 8 ++++++++ 2 files changed, 16 insertions(+)