From patchwork Thu Apr 17 13:18:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Bruel X-Patchwork-Id: 14055612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BC1AC369D1 for ; Thu, 17 Apr 2025 13:48:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=D1vrqcKSTo7wXwCZBje6dgQBk+XJl1AKFrrz1y87N6A=; b=cLOVku55dVN7aMAuXVLdZXtZ+Y 7EFHMD+1An6JAlwhOYqCtUfHimnSZjzNsgye2uLRmmYFrEWp1N3wJpp/1mwBkQEPh+Axbkz0HTAJP FDy7Ko3FR0mm9kdJotOVzFFpGQI3pBSqyc6VLVVTKv4rxsZvrUxu4l7p/BlF5CLaG5w9pt+JYbmWz anvEsm6a06fuof9l3s+52F2ErPo/yxelwia48kxdlL1X+RDNQqZVSqj5ox4tGuyiBY6C1O+urPp/9 OMYLv7iYxbbf3BT5J3OtuLPkYBi83V2nN3BMf6y7PuRL/eclOyDKRGNP4qcNX+y6EDcrLtyyfh/g9 na+Xrg5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1u5Pbc-0000000DCKx-0eAj; Thu, 17 Apr 2025 13:48:40 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1u5PCx-0000000D8a1-2pBG for linux-arm-kernel@lists.infradead.org; Thu, 17 Apr 2025 13:23:13 +0000 Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53HB3H6o007078; Thu, 17 Apr 2025 15:22:50 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= D1vrqcKSTo7wXwCZBje6dgQBk+XJl1AKFrrz1y87N6A=; b=vbs1VLFtptaUArvg 0+ANFYsmT+kBHV3k25Ygtk3S9LVXM4ypToKl/IRszAxx+hV9hST9tbaubPR4+mA1 AupFrloIdQCXTwqi3dea7N+lqmoO0/1FCJGBZbJtujw+pg4Ep6SyvnM2vgquIEbb TsE0nrgU9uu4gEpA0iI98ILECGrgE7lCqmSdpQhl1RM6GAck5lp1gDGYrtnEYq+2 6UiaUR4Tl1O70f6qmYBmOO4fUklhunS5R9Zir4bM0REF2t8uCZ8VRFn79/v8Vokz uWOXmbLm7WpaOd+tm9nnet4xZa+ALT+D4sBTQAiyk4r+4pD3yqMGUQ1HPRWhJg1X M6gp0Q== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 4601r4pc06-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 17 Apr 2025 15:22:50 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 6B93B4004A; Thu, 17 Apr 2025 15:21:25 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 84E2D9927DE; Thu, 17 Apr 2025 15:20:14 +0200 (CEST) Received: from localhost (10.130.77.120) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 17 Apr 2025 15:20:14 +0200 From: Christian Bruel To: , , , , , , , , , , , , , , , CC: , , , , Subject: [PATCH v6 9/9] arm64: dts: st: Enable PCIe on the stm32mp257f-ev1 board Date: Thu, 17 Apr 2025 15:18:33 +0200 Message-ID: <20250417131833.3427126-10-christian.bruel@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250417131833.3427126-1-christian.bruel@foss.st.com> References: <20250417131833.3427126-1-christian.bruel@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.130.77.120] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-17_03,2025-04-17_01,2024-11-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250417_062312_013091_1111D9D1 X-CRM114-Status: UNSURE ( 9.04 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PCIe RC and EP support on stm32mp257f-ev1 board. Default to RC mode. Signed-off-by: Christian Bruel --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 1b88485a62a1..a7646503d6b2 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -225,6 +225,27 @@ scmi_vdd_sdcard: regulator@23 { }; }; +&pcie_ep { + pinctrl-names = "default", "init"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +&pcie_rc { + pinctrl-names = "default", "init", "sleep"; + pinctrl-0 = <&pcie_pins_a>; + pinctrl-1 = <&pcie_init_pins_a>; + pinctrl-2 = <&pcie_sleep_pins_a>; + status = "okay"; + + pcie@0,0 { + reset-gpios = <&gpioj 8 GPIO_ACTIVE_LOW>; + wake-gpios = <&gpioh 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + }; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a>;