| Message ID | 20250417233040.3658761-2-jm@ti.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Misc MMC updates | expand |
On 4/18/2025 5:00 AM, Judith Mendez wrote: > Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT > for eMMC. This change is necessary since DM is not implementing the > correct procedure to switch PLL clock source for eMMC and we have a > non-glich-free mux. To remove any potential issues, lets switch back to > the defaults. IMO, we need to fix DM if not then documentation [0] . Then only this patch is ok because as per document [0] removed clock by this patch is valid parent for eMMC. [0] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/clocks.html Thanks Udit > > Fixes: c37c58fdeb8a ("arm64: dts: ti: k3-am62: Add more peripheral nodes") > Fixes: d3ae4e8d8b6a ("arm64: dts: ti: k3-am62a-main: Add sdhci0 instance") > Fixes: b5080c7c1f7e ("arm64: dts: ti: k3-am62p: Add nodes for more IPs") > Signed-off-by: Judith Mendez <jm@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 2 -- > arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 -- > arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 2 -- > 3 files changed, 6 deletions(-) > > [..]
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 7d355aa73ea21..0c286f600296c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -552,8 +552,6 @@ sdhci0: mmc@fa10000 { power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; clock-names = "clk_ahb", "clk_xin"; - assigned-clocks = <&k3_clks 57 6>; - assigned-clock-parents = <&k3_clks 57 8>; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index a1daba7b1fad5..455ccc770f16a 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -575,8 +575,6 @@ sdhci0: mmc@fa10000 { power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; clock-names = "clk_ahb", "clk_xin"; - assigned-clocks = <&k3_clks 57 6>; - assigned-clock-parents = <&k3_clks 57 8>; bus-width = <8>; mmc-hs200-1_8v; ti,clkbuf-sel = <0x7>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 6e3beb5c2e010..f9b5c97518d68 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -564,8 +564,6 @@ sdhci0: mmc@fa10000 { power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 57 1>, <&k3_clks 57 2>; clock-names = "clk_ahb", "clk_xin"; - assigned-clocks = <&k3_clks 57 2>; - assigned-clock-parents = <&k3_clks 57 4>; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v;
Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT for eMMC. This change is necessary since DM is not implementing the correct procedure to switch PLL clock source for eMMC and we have a non-glich-free mux. To remove any potential issues, lets switch back to the defaults. Fixes: c37c58fdeb8a ("arm64: dts: ti: k3-am62: Add more peripheral nodes") Fixes: d3ae4e8d8b6a ("arm64: dts: ti: k3-am62a-main: Add sdhci0 instance") Fixes: b5080c7c1f7e ("arm64: dts: ti: k3-am62p: Add nodes for more IPs") Signed-off-by: Judith Mendez <jm@ti.com> --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 2 -- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 -- arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 2 -- 3 files changed, 6 deletions(-)