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[68.185.59.186]) by smtp.gmail.com with ESMTPSA id h85sm20106124pfj.89.2016.10.28.09.56.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 28 Oct 2016 09:56:56 -0700 (PDT) From: Joshua Clayton To: Alan Tull , Moritz Fischer Subject: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable Date: Fri, 28 Oct 2016 09:56:42 -0700 Message-Id: <2239ffc8aba7d053825d2bea122a3c16cdd9f6e1.1477669745.git.stillcompiling@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161028_095718_959924_632E6861 X-CRM114-Status: GOOD ( 16.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Joshua Clayton , Russell King , linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Fabio Estevam , Shawn Guo , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The status pin may not show ready in the time described in the Altetera manual. check the value several times before giving up For the hardware I am working on, the status pin takes 250 us, 5 times as long as described by Altera. Signed-off-by: Joshua Clayton --- drivers/fpga/cyclone-ps-spi.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/fpga/cyclone-ps-spi.c b/drivers/fpga/cyclone-ps-spi.c index 4b70d5c..c368223 100644 --- a/drivers/fpga/cyclone-ps-spi.c +++ b/drivers/fpga/cyclone-ps-spi.c @@ -20,6 +20,7 @@ #define FPGA_RESET_TIME 50 /* time in usecs to trigger FPGA config */ -#define FPGA_MIN_DELAY 250 /* min usecs to wait for config status */ +#define FPGA_MIN_DELAY 50 /* min usecs to wait for config status */ +#define FPGA_MAX_DELAY 1000 /* max usecs to wait for config status */ struct cyclonespi_conf { struct gpio_desc *config; @@ -42,6 +43,7 @@ static int cyclonespi_write_init(struct fpga_manager *mgr, u32 flags, const char *buf, size_t count) { struct cyclonespi_conf *conf = (struct cyclonespi_conf *)mgr->priv; + int i; if (flags & FPGA_MGR_PARTIAL_RECONFIG) { dev_err(&mgr->dev, "Partial reconfiguration not supported.\n"); @@ -56,13 +58,14 @@ static int cyclonespi_write_init(struct fpga_manager *mgr, u32 flags, } gpiod_set_value(conf->config, 1); - usleep_range(FPGA_MIN_DELAY, FPGA_MIN_DELAY + 20); - if (gpiod_get_value(conf->status) == 0) { - dev_err(&mgr->dev, "Status pin not ready.\n"); - return -EIO; + for (i = 0; i < (FPGA_MAX_DELAY / FPGA_MIN_DELAY); i++) { + usleep_range(FPGA_MIN_DELAY, FPGA_MIN_DELAY + 20); + if (gpiod_get_value(conf->status)) + return 0; } - return 0; + dev_err(&mgr->dev, "Status pin not ready.\n"); + return -EIO; } static void rev_buf(void *buf, size_t len)