| Message ID | 25401c15dc19c7b672771f5b49a208d6e77bfeb5.1605046192.git.andreyknvl@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v9,01/44] kasan: drop unnecessary GPL text from comment headers | expand |
On Tue, Nov 10, 2020 at 11:10:29PM +0100, Andrey Konovalov wrote: > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > index 664c968dc43c..dbda6598c19d 100644 > --- a/arch/arm64/kernel/mte.c > +++ b/arch/arm64/kernel/mte.c > @@ -129,6 +131,26 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) > return ptr; > } > > +void mte_init_tags(u64 max_tag) > +{ > + static bool gcr_kernel_excl_initialized = false; > + > + if (!gcr_kernel_excl_initialized) { > + /* > + * The format of the tags in KASAN is 0xFF and in MTE is 0xF. > + * This conversion extracts an MTE tag from a KASAN tag. > + */ > + u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT, > + max_tag), 0); > + > + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; > + gcr_kernel_excl_initialized = true; > + } > + > + /* Enable the kernel exclude mask for random tags generation. */ > + write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1); > +} I don't think this function belongs to this patch. There is an earlier patch that talks about mte_init_tags() but no trace of it until this patch.
On 11/12/20 9:39 AM, Catalin Marinas wrote: > On Tue, Nov 10, 2020 at 11:10:29PM +0100, Andrey Konovalov wrote: >> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c >> index 664c968dc43c..dbda6598c19d 100644 >> --- a/arch/arm64/kernel/mte.c >> +++ b/arch/arm64/kernel/mte.c >> @@ -129,6 +131,26 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) >> return ptr; >> } >> >> +void mte_init_tags(u64 max_tag) >> +{ >> + static bool gcr_kernel_excl_initialized = false; >> + >> + if (!gcr_kernel_excl_initialized) { >> + /* >> + * The format of the tags in KASAN is 0xFF and in MTE is 0xF. >> + * This conversion extracts an MTE tag from a KASAN tag. >> + */ >> + u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT, >> + max_tag), 0); >> + >> + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; >> + gcr_kernel_excl_initialized = true; >> + } >> + >> + /* Enable the kernel exclude mask for random tags generation. */ >> + write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1); >> +} > > I don't think this function belongs to this patch. There is an earlier > patch that talks about mte_init_tags() but no trace of it until this > patch. > Could you please point out to which patch are you referring to?
On Thu, Nov 12, 2020 at 09:45:45AM +0000, Vincenzo Frascino wrote: > On 11/12/20 9:39 AM, Catalin Marinas wrote: > > On Tue, Nov 10, 2020 at 11:10:29PM +0100, Andrey Konovalov wrote: > >> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > >> index 664c968dc43c..dbda6598c19d 100644 > >> --- a/arch/arm64/kernel/mte.c > >> +++ b/arch/arm64/kernel/mte.c > >> @@ -129,6 +131,26 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) > >> return ptr; > >> } > >> > >> +void mte_init_tags(u64 max_tag) > >> +{ > >> + static bool gcr_kernel_excl_initialized = false; > >> + > >> + if (!gcr_kernel_excl_initialized) { > >> + /* > >> + * The format of the tags in KASAN is 0xFF and in MTE is 0xF. > >> + * This conversion extracts an MTE tag from a KASAN tag. > >> + */ > >> + u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT, > >> + max_tag), 0); > >> + > >> + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; > >> + gcr_kernel_excl_initialized = true; > >> + } > >> + > >> + /* Enable the kernel exclude mask for random tags generation. */ > >> + write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1); > >> +} > > > > I don't think this function belongs to this patch. There is an earlier > > patch that talks about mte_init_tags() but no trace of it until this > > patch. > > Could you please point out to which patch are you referring to? I replied to it already (or you can search ;)). But this patch is about switching GCR_EL1 on exception entry/exit rather than setting up the initial kernel GCR_EL1 value.
On 11/12/20 9:45 AM, Catalin Marinas wrote: > On Thu, Nov 12, 2020 at 09:45:45AM +0000, Vincenzo Frascino wrote: >> On 11/12/20 9:39 AM, Catalin Marinas wrote: >>> On Tue, Nov 10, 2020 at 11:10:29PM +0100, Andrey Konovalov wrote: >>>> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c >>>> index 664c968dc43c..dbda6598c19d 100644 >>>> --- a/arch/arm64/kernel/mte.c >>>> +++ b/arch/arm64/kernel/mte.c >>>> @@ -129,6 +131,26 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) >>>> return ptr; >>>> } >>>> >>>> +void mte_init_tags(u64 max_tag) >>>> +{ >>>> + static bool gcr_kernel_excl_initialized = false; >>>> + >>>> + if (!gcr_kernel_excl_initialized) { >>>> + /* >>>> + * The format of the tags in KASAN is 0xFF and in MTE is 0xF. >>>> + * This conversion extracts an MTE tag from a KASAN tag. >>>> + */ >>>> + u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT, >>>> + max_tag), 0); >>>> + >>>> + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; >>>> + gcr_kernel_excl_initialized = true; >>>> + } >>>> + >>>> + /* Enable the kernel exclude mask for random tags generation. */ >>>> + write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1); >>>> +} >>> >>> I don't think this function belongs to this patch. There is an earlier >>> patch that talks about mte_init_tags() but no trace of it until this >>> patch. >> >> Could you please point out to which patch are you referring to? > > I replied to it already (or you can search ;)). But this patch is about > switching GCR_EL1 on exception entry/exit rather than setting up the > initial kernel GCR_EL1 value. > Temporally after I asked ;) (I give you the benefit of delay of the mail server ;) ). I think that during the development the logic changed a bit, but I agree that the comments are outdated. I am fine to move the code.
diff --git a/arch/arm64/include/asm/mte-def.h b/arch/arm64/include/asm/mte-def.h index 8401ac5840c7..2d73a1612f09 100644 --- a/arch/arm64/include/asm/mte-def.h +++ b/arch/arm64/include/asm/mte-def.h @@ -10,6 +10,5 @@ #define MTE_TAG_SHIFT 56 #define MTE_TAG_SIZE 4 #define MTE_TAG_MASK GENMASK((MTE_TAG_SHIFT + (MTE_TAG_SIZE - 1)), MTE_TAG_SHIFT) -#define MTE_TAG_MAX (MTE_TAG_MASK >> MTE_TAG_SHIFT) #endif /* __ASM_MTE_DEF_H */ diff --git a/arch/arm64/include/asm/mte-kasan.h b/arch/arm64/include/asm/mte-kasan.h index aa3ea2e0b3a8..7c282758d78b 100644 --- a/arch/arm64/include/asm/mte-kasan.h +++ b/arch/arm64/include/asm/mte-kasan.h @@ -30,6 +30,7 @@ u8 mte_get_random_tag(void); void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag); void mte_enable(void); +void mte_init_tags(u64 max_tag); #else /* CONFIG_ARM64_MTE */ @@ -55,6 +56,10 @@ static inline void mte_enable(void) { } +static inline void mte_init_tags(u64 max_tag) +{ +} + #endif /* CONFIG_ARM64_MTE */ #endif /* __ASSEMBLY__ */ diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h index cf1cd181dcb2..d02aff9f493d 100644 --- a/arch/arm64/include/asm/mte.h +++ b/arch/arm64/include/asm/mte.h @@ -18,6 +18,8 @@ #include <asm/pgtable-types.h> +extern u64 gcr_kernel_excl; + void mte_clear_page_tags(void *addr); unsigned long mte_copy_tags_from_user(void *to, const void __user *from, unsigned long n); diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c index 7d32fc959b1a..dfe6ed8446ac 100644 --- a/arch/arm64/kernel/asm-offsets.c +++ b/arch/arm64/kernel/asm-offsets.c @@ -47,6 +47,9 @@ int main(void) #ifdef CONFIG_ARM64_PTR_AUTH DEFINE(THREAD_KEYS_USER, offsetof(struct task_struct, thread.keys_user)); DEFINE(THREAD_KEYS_KERNEL, offsetof(struct task_struct, thread.keys_kernel)); +#endif +#ifdef CONFIG_ARM64_MTE + DEFINE(THREAD_GCR_EL1_USER, offsetof(struct task_struct, thread.gcr_user_excl)); #endif BLANK(); DEFINE(S_X0, offsetof(struct pt_regs, regs[0])); diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index b295fb912b12..07646ef4f184 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -173,6 +173,43 @@ alternative_else_nop_endif #endif .endm + .macro mte_set_gcr, tmp, tmp2 +#ifdef CONFIG_ARM64_MTE + /* + * Calculate and set the exclude mask preserving + * the RRND (bit[16]) setting. + */ + mrs_s \tmp2, SYS_GCR_EL1 + bfi \tmp2, \tmp, #0, #16 + msr_s SYS_GCR_EL1, \tmp2 + isb +#endif + .endm + + .macro mte_set_kernel_gcr, tmp, tmp2 +#ifdef CONFIG_KASAN_HW_TAGS +alternative_if_not ARM64_MTE + b 1f +alternative_else_nop_endif + ldr_l \tmp, gcr_kernel_excl + + mte_set_gcr \tmp, \tmp2 +1: +#endif + .endm + + .macro mte_set_user_gcr, tsk, tmp, tmp2 +#ifdef CONFIG_ARM64_MTE +alternative_if_not ARM64_MTE + b 1f +alternative_else_nop_endif + ldr \tmp, [\tsk, #THREAD_GCR_EL1_USER] + + mte_set_gcr \tmp, \tmp2 +1: +#endif + .endm + .macro kernel_entry, el, regsize = 64 .if \regsize == 32 mov w0, w0 // zero upper 32 bits of x0 @@ -212,6 +249,8 @@ alternative_else_nop_endif ptrauth_keys_install_kernel tsk, x20, x22, x23 + mte_set_kernel_gcr x22, x23 + scs_load tsk, x20 .else add x21, sp, #S_FRAME_SIZE @@ -330,6 +369,8 @@ alternative_else_nop_endif /* No kernel C function calls after this as user keys are set. */ ptrauth_keys_install_user tsk, x0, x1, x2 + mte_set_user_gcr tsk, x0, x1 + apply_ssbd 0, x0, x1 .endif diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c index 664c968dc43c..dbda6598c19d 100644 --- a/arch/arm64/kernel/mte.c +++ b/arch/arm64/kernel/mte.c @@ -23,6 +23,8 @@ #include <asm/ptrace.h> #include <asm/sysreg.h> +u64 gcr_kernel_excl __ro_after_init; + static void mte_sync_page_tags(struct page *page, pte_t *ptep, bool check_swap) { pte_t old_pte = READ_ONCE(*ptep); @@ -129,6 +131,26 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag) return ptr; } +void mte_init_tags(u64 max_tag) +{ + static bool gcr_kernel_excl_initialized = false; + + if (!gcr_kernel_excl_initialized) { + /* + * The format of the tags in KASAN is 0xFF and in MTE is 0xF. + * This conversion extracts an MTE tag from a KASAN tag. + */ + u64 incl = GENMASK(FIELD_GET(MTE_TAG_MASK >> MTE_TAG_SHIFT, + max_tag), 0); + + gcr_kernel_excl = ~incl & SYS_GCR_EL1_EXCL_MASK; + gcr_kernel_excl_initialized = true; + } + + /* Enable the kernel exclude mask for random tags generation. */ + write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1); +} + void mte_enable(void) { /* Enable MTE Sync Mode for EL1. */ @@ -171,7 +193,11 @@ static void update_gcr_el1_excl(u64 excl) static void set_gcr_el1_excl(u64 excl) { current->thread.gcr_user_excl = excl; - update_gcr_el1_excl(excl); + + /* + * SYS_GCR_EL1 will be set to current->thread.gcr_user_excl value + * by mte_set_user_gcr() in kernel_exit, + */ } void flush_mte_state(void) @@ -197,7 +223,6 @@ void mte_thread_switch(struct task_struct *next) /* avoid expensive SCTLR_EL1 accesses if no change */ if (current->thread.sctlr_tcf0 != next->thread.sctlr_tcf0) update_sctlr_el1_tcf0(next->thread.sctlr_tcf0); - update_gcr_el1_excl(next->thread.gcr_user_excl); } void mte_suspend_exit(void) @@ -205,7 +230,7 @@ void mte_suspend_exit(void) if (!system_supports_mte()) return; - update_gcr_el1_excl(current->thread.gcr_user_excl); + update_gcr_el1_excl(gcr_kernel_excl); } long set_mte_ctrl(struct task_struct *task, unsigned long arg)