diff mbox series

[1/2] arm64: dts: renesas: r8a779h0: Add RPC node

Message ID 26f9c5d5a7944db3813ed53459aa9c5767c1bdc0.1708354463.git.geert+renesas@glider.be (mailing list archive)
State New, archived
Headers show
Series [1/2] arm64: dts: renesas: r8a779h0: Add RPC node | expand

Commit Message

Geert Uytterhoeven Feb. 19, 2024, 3 p.m. UTC
From: Cong Dang <cong.dang.xn@renesas.com>

Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Changes compared to the BSP:
  - Drop undocumented clock-names property.
---
 arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Wolfram Sang Feb. 19, 2024, 4:51 p.m. UTC | #1
On Mon, Feb 19, 2024 at 04:00:40PM +0100, Geert Uytterhoeven wrote:
> From: Cong Dang <cong.dang.xn@renesas.com>
> 
> Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
> Renesas R-Car V4M (R8A779H0) SoC.
> 
> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
index 46c586f4e326959f..11885729181bc903 100644
--- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
@@ -621,6 +621,22 @@  mmc0: mmc@ee140000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a779h0-rpc-if",
+				     "renesas,rcar-gen4-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 629>;
+			power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+			resets = <&cpg 629>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;