From patchwork Thu Jun 23 15:20:39 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "EXTERNAL Waechtler Peter (Fa. TCP, CM-AI/PJ-CF31)" X-Patchwork-Id: 909192 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p5NG4HJA017474 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 23 Jun 2011 16:04:43 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QZli3-0003kk-TM; Thu, 23 Jun 2011 15:20:48 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QZli3-0006Z3-C3; Thu, 23 Jun 2011 15:20:47 +0000 Received: from smtp2-v.fe.bosch.de ([139.15.237.6]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QZlhz-0006Yh-MR for linux-arm-kernel@lists.infradead.org; Thu, 23 Jun 2011 15:20:44 +0000 Received: from vsmta11.fe.internet.bosch.com (unknown [10.4.98.30]) by imta24.fe.bosch.de (Postfix) with ESMTP id 935BBB3B87AD; Thu, 23 Jun 2011 17:20:41 +0200 (CEST) Received: from si-hub01.de.bosch.com (vsgw2.fe.internet.bosch.com [10.4.98.13]) by vsmta11.fe.internet.bosch.com (Postfix) with ESMTP id D5F7C4E08196; Thu, 23 Jun 2011 17:20:40 +0200 (CEST) Received: from SI-MBX06.de.bosch.com ([10.3.153.42]) by si-hub01.de.bosch.com ([10.3.153.36]) with mapi; Thu, 23 Jun 2011 17:20:40 +0200 From: "EXTERNAL Waechtler Peter (Fa. TCP, CM-AI/PJ-CF31)" To: Catalin Marinas Date: Thu, 23 Jun 2011 17:20:39 +0200 Subject: AW: parallel load of modules on an ARM multicore Thread-Topic: parallel load of modules on an ARM multicore Thread-Index: AcwxtQde7yWbcyPBSai905v8aAOlQwAAKEMQ Message-ID: <274124B9C6907D4B8CE985903EAA19E9185A92978E@SI-MBX06.de.bosch.com> References: <274124B9C6907D4B8CE985903EAA19E9185A92923E@SI-MBX06.de.bosch.com> <20110621155030.GA21245@1n450.cable.virginmedia.net> <274124B9C6907D4B8CE985903EAA19E9185A92978D@SI-MBX06.de.bosch.com> <20110623145229.GA18409@1n450.cable.virginmedia.net> In-Reply-To: <20110623145229.GA18409@1n450.cable.virginmedia.net> Accept-Language: en-US, de-DE Content-Language: de-DE X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US, de-DE MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110623_112043_887166_64FA7294 X-CRM114-Status: GOOD ( 26.83 ) X-Spam-Score: -5.0 (-----) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-5.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [139.15.237.6 listed in list.dnswl.org] Cc: "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 23 Jun 2011 16:04:43 +0000 (UTC) X-MIME-Autoconverted: from quoted-printable to 8bit by demeter1.kernel.org id p5NG4HJA017474 No, you didn't say that, but the patch ;) On ARM11MPcore cache_ops_need_broadcast() returns true - with that, anytime the thread migrates the icache is flushed? Mit freundlichen Grüßen / Best regards Peter Wächtler > -----Ursprüngliche Nachricht----- > Von: Catalin Marinas [mailto:catalin.marinas@gmail.com] Im > Auftrag von Catalin Marinas > Gesendet: Donnerstag, 23. Juni 2011 16:52 > An: EXTERNAL Waechtler Peter (Fa. TCP, CM-AI/PJ-CF31) > Cc: linux-arm-kernel@lists.infradead.org > Betreff: Re: parallel load of modules on an ARM multicore > > Peter, > > On Thu, Jun 23, 2011 at 04:39:01PM +0200, EXTERNAL Waechtler > Peter (Fa. TCP, CM-AI/PJ-CF31) wrote: > > it's interesting that you almost agree with me. > > > > But isn't it really expensive to flush the icache on switch_mm? > > Is that meant as a test to see if the problem goes away? > > Who said anything about flushing the icache on switch_mm()? My patch > doesn't do this, it actually reduces the amount of cache flushing on > ARM11MPCore. > > > Wouldn't it suffice to get_cpu/put_cpu to disable preemption while > > load_module() works? > > It may work, just give it a try. > > > I think the other way will cause trouble: the module is loaded on > > cpu0 for example, preempted, woken up on cpu1 with a stale icache > > line not holding the "newly loaded code" and running mod->init peng! > > Nobody told cpu1 to revalidate it's icache. > > Don't know if this is possible though. > > That's possible as well if the pages allocated for the module > code have > been previously used for other code. > > To resolve the stale I-cache lines, you would have to broadcast the > cache maintenance to all the CPUs. For the D-cache we could trick the > CPU via some reading to force the dirty cache lines migration > but that's > not possible for the I-cache. > > > The data of the module won't get through the icache anyway. > > No but the module is copied into the new allocated space via the > D-cache. This needs to be flushed so that the I-cache would get the > right instructions. > > > AFAIK we are not able to reproduce quickly and it will take some > > time before I can try... > > OK, just let us know how it goes. > > -- > Catalin > --- a/arch/arm/include/asm/mmu_context.h +++ b/arch/arm/include/asm/mmu_context.h @@ -114,7 +114,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, #ifdef CONFIG_SMP /* check for possible thread migration */ if (!cpumask_empty(mm_cpumask(next)) && - !cpumask_test_cpu(cpu, mm_cpumask(next))) + (cache_ops_need_broadcast() || + !cpumask_test_cpu(cpu, mm_cpumask(next)))) __flush_icache_all();