From patchwork Wed Dec 19 18:18:42 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Soren Brinkmann X-Patchwork-Id: 1896621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id D81E73FC81 for ; Wed, 19 Dec 2012 18:22:56 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TlOF4-0008Vv-9L; Wed, 19 Dec 2012 18:19:42 +0000 Received: from va3ehsobe004.messaging.microsoft.com ([216.32.180.14] helo=va3outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TlOEV-0008Ns-OJ for linux-arm-kernel@lists.infradead.org; Wed, 19 Dec 2012 18:19:09 +0000 Received: from mail229-va3-R.bigfish.com (10.7.14.236) by VA3EHSOBE006.bigfish.com (10.7.40.26) with Microsoft SMTP Server id 14.1.225.23; Wed, 19 Dec 2012 18:19:05 +0000 Received: from mail229-va3 (localhost [127.0.0.1]) by mail229-va3-R.bigfish.com (Postfix) with ESMTP id 7B7DED600CF; Wed, 19 Dec 2012 18:19:05 +0000 (UTC) X-Forefront-Antispam-Report: CIP:149.199.60.83; KIP:(null); UIP:(null); IPV:NLI; H:xsj-gw1; RD:unknown-60-83.xilinx.com; EFVD:NLI X-SpamScore: 1 X-BigFish: VPS1(zzzz1de0h1202h1e76h1d1ah1d2ahzz8275bhz2fh95h668h839hd24hf0ah119dh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14ddh1504h1537h162dh1631h1758h906i1155h) Received-SPF: pass (mail229-va3: domain of xilinx.com designates 149.199.60.83 as permitted sender) client-ip=149.199.60.83; envelope-from=soren.brinkmann@xilinx.com; helo=xsj-gw1 ; helo=xsj-gw1 ; Received: from mail229-va3 (localhost.localdomain [127.0.0.1]) by mail229-va3 (MessageSwitch) id 1355941142983693_29669; Wed, 19 Dec 2012 18:19:02 +0000 (UTC) Received: from VA3EHSMHS004.bigfish.com (unknown [10.7.14.240]) by mail229-va3.bigfish.com (Postfix) with ESMTP id ED4334006E; Wed, 19 Dec 2012 18:19:02 +0000 (UTC) Received: from xsj-gw1 (149.199.60.83) by VA3EHSMHS004.bigfish.com (10.7.99.14) with Microsoft SMTP Server id 14.1.225.23; Wed, 19 Dec 2012 18:19:02 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-smtp1.xilinx.com) by xsj-gw1 with esmtp (Exim 4.63) (envelope-from ) id 1TlOEQ-0002Q3-2P; Wed, 19 Dec 2012 10:19:02 -0800 From: Soren Brinkmann To: Michal Simek , Subject: [PATCH v2 7/7] arm: zynq: timer: Set clock_event cpumask Date: Wed, 19 Dec 2012 10:18:42 -0800 X-Mailer: git-send-email 1.8.0.2 In-Reply-To: References: X-RCIS-Action: ALLOW MIME-Version: 1.0 Message-ID: <2a6829e8-3578-4fcf-b6d2-406576187abb@VA3EHSMHS004.ehs.local> X-OriginatorOrg: xilinx.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121219_131907_892027_5F25DE00 X-CRM114-Status: UNSURE ( 8.61 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.14 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Soren Brinkmann , josh.cartwright@ni.com, nbowler@elliptictech.com, Arnd Bergmann , linux-kernel@vger.kernel.org, git@xilinx.com, John Linn , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The timers are common to both A9 cores, so let's set the clock event struct's cpumask accordingly, to all possible CPUs. Signed-off-by: Soren Brinkmann Reviewed-by: Josh Cartwright --- arch/arm/mach-zynq/timer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 7b2e047..f9fbc9c 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -267,6 +267,7 @@ static void __init zynq_ttc_setup_clockevent(struct device_node *np, ttcce->ce.set_mode = xttcps_set_mode; ttcce->ce.rating = 200; ttcce->ce.irq = irq; + ttcce->ce.cpumask = cpu_possible_mask; __raw_writel(0x23, ttcce->xttc.base_addr + XTTCPS_CNT_CNTRL_OFFSET); __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN,