From patchwork Wed Jul 19 15:31:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Gonzalez X-Patchwork-Id: 9852593 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 58A03602C8 for ; Wed, 19 Jul 2017 15:45:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 48A2727FA6 for ; Wed, 19 Jul 2017 15:45:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3D8A728537; Wed, 19 Jul 2017 15:45:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AE38627FA6 for ; Wed, 19 Jul 2017 15:45:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:References:To:From:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=G5nOxrvyYJUlF88RVgE8EvLhqlR1Je00Rq1K0rNR4n4=; b=slZu9yrC/Ti28+ zPNnoJIsUFp+F7tItO7yPkzudRfdnqDWW9B/M5NS8qVozZt3HauW4UYxw7nHHlCnuJsEyWPbJpxga XIEQbXz1hvLVAh4Nj1s+XLEYtJu3wA4HKrVI5R/MnuCRtjI+y02/eNNoAi+tOG2ZxC2W5Xtw+8OYR FwRYp8cF6LGOewOod2hj/0B9LOhiJXYJPoOSsW1CGatH9du8iCBxBB0U2nOppBEEewvIKh2zTzlCM BS3le0zijDtwL8tsFY9xMEJ7QN62QXUNApjA4uty1+srrSZ9GaQJSNLzEndoNb7JfE4EgBdTBUncW oi9wE/iuEz3rl7zwugFQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dXr9u-0004Qb-Op; Wed, 19 Jul 2017 15:45:06 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dXr9a-0003Xq-P8 for linux-arm-kernel@bombadil.infradead.org; Wed, 19 Jul 2017 15:44:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:References:CC:To:From:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=WQUdf/jKsM1J5m2ZVXY3P8BUMYe08eDG/DCjix7wIQw=; b=AscFRsc+e6HBzzpN0BaPHmQmhR KbyGhQ1+jasvbxG9ppJo2dZVa33Bb0nN9TVeeMv+lDdVWzl2QKSwnOnVRmFv7zwRVddpYyc/v/ezr xZdzVVt+ZTQSvyHiIbiBmlPrZgRX7dMpWs3mF7fSgEm6e8cbxqmC7gUO1atM/hbR1tYnx+W82x4S1 e+QYoXhJfRIY9YpuRZ36w4g+fcL3s0j9PCbK0tRMioB9oxDYhgJ+h62fAatKceG86Y8HOfiCJH/b1 LfsUs6Tq477/Yl4BSGR4/IcnjUEI/lZatVAsRm4CX/zV8RMumkNZNaOzULsZVZdnFR5fgUQ2FsX/8 NCRQOGnQ==; Received: from us-smtp-delivery-107.mimecast.com ([63.128.21.107]) by casper.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dXqzn-00049K-AI for linux-arm-kernel@lists.infradead.org; Wed, 19 Jul 2017 15:34:41 +0000 Received: from CPH-EX1.SDESIGNS.COM (195-215-56-170-static.dk.customer.tdc.net [195.215.56.170]) (Using TLS) by us-smtp-1.mimecast.com with ESMTP id us-mta-120-C_O31SHsMfOWV7nEZ0plgw-1; Wed, 19 Jul 2017 11:34:07 -0400 Received: from [172.27.0.114] (172.27.0.114) by CPH-EX1.sdesigns.com (192.168.10.36) with Microsoft SMTP Server (TLS) id 14.3.294.0; Wed, 19 Jul 2017 17:34:04 +0200 Subject: [PATCH 1/2] net: phy: at803x: Fix RGMII RX and TX clock delays setup From: Marc Gonzalez To: Florian Fainelli , Andrew Lunn , Mans Rullgard , Martin Blumenstingl , Grygorii Strashko , Fabio Estevam , Zefir Kurtisi , Timur Tabi , Daniel Mack References: Message-ID: <33ed5f4f-9939-dc00-b973-db39c16f2393@sigmadesigns.com> Date: Wed, 19 Jul 2017 17:31:56 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Firefox/52.0 SeaMonkey/2.49.1 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [172.27.0.114] X-MC-Unique: C_O31SHsMfOWV7nEZ0plgw-1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170719_163439_521208_E67FB7F3 X-CRM114-Status: GOOD ( 11.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: netdev , Thibaud Cornic , "David S. Miller" , Linux ARM , Mason Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The current code supports enabling RGMII RX and TX clock delays. The unstated assumption is that these settings are disabled by default at reset, which is not the case. RX clock delay is enabled at reset. And TX clock delay "survives" across SW resets. Thus, if the bootloader enables TX clock delay, it will remain enabled at reset in Linux. Provide disable functions to configure the RGMII clock delays exactly as specified in the fwspec. Signed-off-by: Marc Gonzalez Acked-by: Timur Tabi --- drivers/net/phy/at803x.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index c1e52b9dc58d..9c96eaaaa2cb 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -117,12 +117,24 @@ static inline int at803x_enable_rx_delay(struct phy_device *phydev) AT803X_DEBUG_RX_CLK_DLY_EN); } +static inline int at803x_disable_rx_delay(struct phy_device *phydev) +{ + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + AT803X_DEBUG_RX_CLK_DLY_EN, 0); +} + static inline int at803x_enable_tx_delay(struct phy_device *phydev) { return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0, AT803X_DEBUG_TX_CLK_DLY_EN); } +static inline int at803x_disable_tx_delay(struct phy_device *phydev) +{ + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, + AT803X_DEBUG_TX_CLK_DLY_EN, 0); +} + /* save relevant PHY registers to private copy */ static void at803x_context_save(struct phy_device *phydev, struct at803x_context *context) @@ -284,18 +296,22 @@ static int at803x_config_init(struct phy_device *phydev) return ret; if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ret = at803x_enable_rx_delay(phydev); - if (ret < 0) - return ret; - } + else + ret = at803x_disable_rx_delay(phydev); + + if (ret < 0) + return ret; if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ret = at803x_enable_tx_delay(phydev); - if (ret < 0) - return ret; - } + else + ret = at803x_disable_tx_delay(phydev); + + if (ret < 0) + return ret; return 0; }