Message ID | 34ecf45f0f9a0fa34a580f162f02c23d9b849d90.1701793996.git.robin.murphy@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | perf/arm_cspmu: Add devicetree support | expand |
On Tue, 5 Dec 2023, Robin Murphy wrote: > arm_cspmu_reset_counters() inherently also stops them since it is > writing 0 to PMCR.E, so there should be no need to do that twice. > Also tidy up the reset routine itself for consistency with the start > and stop routines, and to be clear at first glance that it is simply > writing a constant value. > > Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Cheers, Ilkka > --- > drivers/perf/arm_cspmu/arm_cspmu.c | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c > index f7aa2ac5fd88..b64de4d800c7 100644 > --- a/drivers/perf/arm_cspmu/arm_cspmu.c > +++ b/drivers/perf/arm_cspmu/arm_cspmu.c > @@ -525,11 +525,7 @@ static int arm_cspmu_alloc_attr_groups(struct arm_cspmu *cspmu) > > static inline void arm_cspmu_reset_counters(struct arm_cspmu *cspmu) > { > - u32 pmcr = 0; > - > - pmcr |= PMCR_P; > - pmcr |= PMCR_C; > - writel(pmcr, cspmu->base0 + PMCR); > + writel(PMCR_C | PMCR_P, cspmu->base0 + PMCR); > } > > static inline void arm_cspmu_start_counters(struct arm_cspmu *cspmu) > @@ -1189,7 +1185,6 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *cspmu) > }; > > /* Hardware counter init */ > - arm_cspmu_stop_counters(cspmu); > arm_cspmu_reset_counters(cspmu); > > ret = perf_pmu_register(&cspmu->pmu, cspmu->name, -1); > -- > 2.39.2.101.g768bb238c484.dirty > >
diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c index f7aa2ac5fd88..b64de4d800c7 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.c +++ b/drivers/perf/arm_cspmu/arm_cspmu.c @@ -525,11 +525,7 @@ static int arm_cspmu_alloc_attr_groups(struct arm_cspmu *cspmu) static inline void arm_cspmu_reset_counters(struct arm_cspmu *cspmu) { - u32 pmcr = 0; - - pmcr |= PMCR_P; - pmcr |= PMCR_C; - writel(pmcr, cspmu->base0 + PMCR); + writel(PMCR_C | PMCR_P, cspmu->base0 + PMCR); } static inline void arm_cspmu_start_counters(struct arm_cspmu *cspmu) @@ -1189,7 +1185,6 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *cspmu) }; /* Hardware counter init */ - arm_cspmu_stop_counters(cspmu); arm_cspmu_reset_counters(cspmu); ret = perf_pmu_register(&cspmu->pmu, cspmu->name, -1);
arm_cspmu_reset_counters() inherently also stops them since it is writing 0 to PMCR.E, so there should be no need to do that twice. Also tidy up the reset routine itself for consistency with the start and stop routines, and to be clear at first glance that it is simply writing a constant value. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- drivers/perf/arm_cspmu/arm_cspmu.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-)