mx25 gpt-clock issue, waits are too long

Commit Message

Mehnert, Torsten July 4, 2011, 3:24 p.m. UTC

Hi,

i am using barebox and standard linux (2.6.39.1) on my mx25 board. Under linux i now have the problem
that a sleepwait or busywait results in a factor 1.8 too long waiting time. So sleep(10) results in ~18 seconds
of waiting.

I see through the clock registers
and found that the clock source of the general purpose timer is set to UPLL(240MHz), divided by 2 its 120MHz.
So when 120Mhz is factor 1.8 too much, then the correct value should be 66MHz. As this value can't be divided from
UPLL i changed the clock source to AHB_DIV(133MHz), get the 66MHz and my sleep(10) are the proper 10 seconds.
I think that the clock-mx25.c expected the CCM_MCR register to be cleared completely, which it's not in my case.

I tested this issue again on the mx25-3stack evaluation board, with the same result.

Old Kernel message: sched_clock: 32 bits at 120MHz, resolution 8ns, wraps every 35791ms
New Kernel message: sched_clock: 32 bits at 66MHz, resolution 15ns, wraps every 64585ms


This patch fixes this issue:

Request for comment and feedback.

From: T. Mehnert <[e-mail]>
Date: Mon, 4 Jul 2011 15:53:30 +0200
Subject: [PATCH] GPT clock fix: corrected the clock source

This patch changes the clock source for the general purpose timer
of the arm/mx25 from UPLL to AHB_DIV. This fixes the problem,
that sleep/busy wating waits factor 1.8 too long.

Signed-off-by: Torsten Mehnert <[e-mail]>
---
 arch/arm/mach-imx/clock-imx25.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

--
1.7.0.4
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Comments

Baruch Siach July 8, 2011, 7:25 a.m. UTC | #1

Hi Torsten,

On Mon, Jul 04, 2011 at 03:24:25PM +0000, Mehnert, Torsten wrote:
> i am using barebox and standard linux (2.6.39.1) on my mx25 board. Under 
> linux i now have the problem
> that a sleepwait or busywait results in a factor 1.8 too long waiting time.  
> So sleep(10) results in ~18 seconds
> of waiting.
> 
> I see through the clock registers
> and found that the clock source of the general purpose timer is set to 
> UPLL(240MHz), divided by 2 its 120MHz.
> So when 120Mhz is factor 1.8 too much, then the correct value should be 
> 66MHz. As this value can't be divided from
> UPLL i changed the clock source to AHB_DIV(133MHz), get the 66MHz and my 
> sleep(10) are the proper 10 seconds.
> I think that the clock-mx25.c expected the CCM_MCR register to be cleared 
> completely, which it's not in my case.
> 
> I tested this issue again on the mx25-3stack evaluation board, with the same result.
> 
> Old Kernel message: sched_clock: 32 bits at 120MHz, resolution 8ns, wraps every 35791ms
> New Kernel message: sched_clock: 32 bits at 66MHz, resolution 15ns, wraps every 64585ms

You should Cc Sascha Hauer <[e-mail]> on i.MX related patches.  
Also, see the tread at 
http://thread.gmane.org/gmane.linux.ports.arm.kernel/72944, and especially the 
note of Rob Herring of (then) Freescale.

baruch

> This patch fixes this issue:
> 
> Request for comment and feedback.
> 
> From: T. Mehnert <[e-mail]>
> Date: Mon, 4 Jul 2011 15:53:30 +0200
> Subject: [PATCH] GPT clock fix: corrected the clock source
> 
> This patch changes the clock source for the general purpose timer
> of the arm/mx25 from UPLL to AHB_DIV. This fixes the problem,
> that sleep/busy wating waits factor 1.8 too long.
> 
> Signed-off-by: Torsten Mehnert <[e-mail]>
> ---
>  arch/arm/mach-imx/clock-imx25.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
> index a65838f..bf1ecda 100644
> --- a/arch/arm/mach-imx/clock-imx25.c
> +++ b/arch/arm/mach-imx/clock-imx25.c
> @@ -328,6 +328,10 @@ int __init mx25_clocks_init(void)
>         __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0),
>                         CRM_BASE + 0x64);
> 
> +       /* Clock source for gpt is ahb_div */
> +       __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5),
> +                       CRM_BASE + 0x64);
> +
>         mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
> 
>         return 0;
> --

Patch

diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
index a65838f..bf1ecda 100644
--- a/arch/arm/mach-imx/clock-imx25.c
+++ b/arch/arm/mach-imx/clock-imx25.c
@@ -328,6 +328,10 @@  int __init mx25_clocks_init(void)
        __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0),
                        CRM_BASE + 0x64);

+       /* Clock source for gpt is ahb_div */
+       __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5),
+                       CRM_BASE + 0x64);
+
        mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);

        return 0;