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Fri, 12 Apr 2024 20:47:43 -0700 From: Nicolin Chen To: , , , , CC: , , , , , , , , , , , Subject: [PATCH RFCv1 05/14] iommufd: Add IOMMUFD_OBJ_VIOMMU and IOMMUFD_CMD_VIOMMU_ALLOC Date: Fri, 12 Apr 2024 20:47:02 -0700 Message-ID: <3aa9bc1df6a2ee58a03c6ea6ededbc210a2d23a8.1712978212.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06B:EE_|DM4PR12MB5988:EE_ X-MS-Office365-Filtering-Correlation-Id: 17023489-6d24-4a6a-e17b-08dc5b6c8059 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9EEs+9QuF7f7lESZgkrqjvNRWpQZsMOKSJbefk73CxbnRnfLneCTTMLEEHhIhMYRSoyGfkQ4i4TKfVD2MZkJzkLVo6/WII1ez/ORCR8YCpqimm+1sw1evHU+z1aJxR2R/pBsoAv2HAVEGDjwH/KFdKVhLX4TUGrBuoNc2FYytsK70fFe0d/TE2A0MCcn8WsmLmK4oZpUMPM7yIarqD5icFp0UtUSq+q3Gvz/yMIHy8aJ3EJhGbJlU19EiyFxMOM4CDdIavk6ggZHeRN8vf1qc89UlAfYafrZWNd+iblvBZqXr1ybKAwgqoqQB3sXQ1S44748qRofKif30GkB1MKtuKw02wRp+ex1X4SFvj7/K7uup5OD8Bze0OKBrlWhvENLDeD/wr9Le265/szNm+zUHmY0an3bkX0ZKZjiNZeNOPfKeKvBonmyPz24gn+bm8f/iu+hoFz+FHb90iV4h/5WLmFeZi0ZgkO6DgiNT3DCnE1ptielbiRJNlGtKwSvV5V8C+7qgREXVBczsupwTY2jOhGPDWqzW93QK8H4D9OI7B67s3HVF2qZoaFmzCQFu6SR9nz9W5/FzMMWcAGEXritIc7DttUDfSIEltmHNka0sMaKKj/Qwem3Ws89JPoGD30OHlcaYzz1djNc6il0FBF82ajB1/14rginS+3nlPnfttB0sTYoVTBHWa6isPrcHu7/L5n+4kKusdk8d+vhDfz+um3K/gdUnh7PdchHaN8vuyWlwbKH8alTQisRs2GGCv1iL5lDVqRHKN+av/zquG8ChoqYV4bE9l6AVsWh07jUAkZN1xLndLNvW3IIhnoZVtVziJvlkvbrLAjiEa0W6uiFA6RyLhzkWnbD2Lr1vPs+zVzp2xPv7SPB+9in1IqUpL35T6oJ8bT+WjgUMmc2uLuNW5x/S8lDTculRbUhzkQTuzzldY6o1gZTNula/aDWA6PK10rXMXagPxsYSDQ/Q2Iv45dqfOPZLFC6YlrKPWPxo/bf/pcguGqqNfIsa/b4F8DP0onZSjPDcV1JjcLMaOFYyg3q3ayfJJqfYWLgRL8vsWkNoSK+P9UOPplASX0UEl4yPwZqeiHF8m8wyGarKCjX8/fIfHcJdgIFy/BNkrBp6mxKV1G3Mi4U8oGIWyBV8N4R13Qys5LSQzOj2YMFQGoxcgrrIeGuGC7h2vHvw2/mXk1UDvNPlflCrBebz/1aX4yKX+YFofxM64HusC28bxo3tlGQvpKKeMGak57qbV5JQkWIDNOHOSxxsnZhlHy9+Ix5rof5eqST9Edq+IbL+346gLpHe2IsniPMK/zGuHhxaTa6XG71QAlu57/lXcpCfgDI0a+7ChPoCycO8azQRzJbj0rpN8fGNhZBQ40lR40IPwXzNKdALZ+I5JNWZnQsFKx2 X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(82310400014)(7416005)(376005)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2024 03:47:54.5706 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 17023489-6d24-4a6a-e17b-08dc5b6c8059 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06B.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5988 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240412_204758_749445_C30309A6 X-CRM114-Status: GOOD ( 14.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Corresponding to the new iommufd_viommu core structure that represents a vIOMMU instance in the user space for HW-accelerated features, add a new IOMMUFD_OBJ_VIOMMU and its ioctl for user space to allocate it. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_private.h | 3 + drivers/iommu/iommufd/main.c | 6 ++ drivers/iommu/iommufd/viommu.c | 83 +++++++++++++++++++++++++ include/linux/iommufd.h | 1 + include/uapi/linux/iommufd.h | 30 +++++++++ 5 files changed, 123 insertions(+) diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index eccc565ed38e..ae90b4493109 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -424,6 +424,9 @@ void iopt_remove_access(struct io_pagetable *iopt, u32 iopt_access_list_id); void iommufd_access_destroy_object(struct iommufd_object *obj); +int iommufd_viommu_alloc_ioctl(struct iommufd_ucmd *ucmd); +void iommufd_viommu_destroy(struct iommufd_object *obj); + #ifdef CONFIG_IOMMUFD_TEST int iommufd_test(struct iommufd_ucmd *ucmd); void iommufd_selftest_destroy(struct iommufd_object *obj); diff --git a/drivers/iommu/iommufd/main.c b/drivers/iommu/iommufd/main.c index 5187942b375d..9de7e3e63ce4 100644 --- a/drivers/iommu/iommufd/main.c +++ b/drivers/iommu/iommufd/main.c @@ -323,6 +323,7 @@ union ucmd_buffer { struct iommu_hwpt_set_dirty_tracking set_dirty_tracking; struct iommu_ioas_alloc alloc; struct iommu_ioas_allow_iovas allow_iovas; + struct iommu_viommu_alloc viommu; struct iommu_ioas_copy ioas_copy; struct iommu_ioas_iova_ranges iova_ranges; struct iommu_ioas_map map; @@ -378,6 +379,8 @@ static const struct iommufd_ioctl_op iommufd_ioctl_ops[] = { val64), IOCTL_OP(IOMMU_VFIO_IOAS, iommufd_vfio_ioas, struct iommu_vfio_ioas, __reserved), + IOCTL_OP(IOMMU_VIOMMU_ALLOC, iommufd_viommu_alloc_ioctl, + struct iommu_viommu_alloc, out_viommu_id), #ifdef CONFIG_IOMMUFD_TEST IOCTL_OP(IOMMU_TEST_CMD, iommufd_test, struct iommu_test_cmd, last), #endif @@ -510,6 +513,9 @@ static const struct iommufd_object_ops iommufd_object_ops[] = { .destroy = iommufd_hwpt_nested_destroy, .abort = iommufd_hwpt_nested_abort, }, + [IOMMUFD_OBJ_VIOMMU] = { + .destroy = iommufd_viommu_destroy, + }, #ifdef CONFIG_IOMMUFD_TEST [IOMMUFD_OBJ_SELFTEST] = { .destroy = iommufd_selftest_destroy, diff --git a/drivers/iommu/iommufd/viommu.c b/drivers/iommu/iommufd/viommu.c index 3886b1dd1f13..079e0ff79942 100644 --- a/drivers/iommu/iommufd/viommu.c +++ b/drivers/iommu/iommufd/viommu.c @@ -19,3 +19,86 @@ } viommu_struct_alloc(viommu); + +void iommufd_viommu_destroy(struct iommufd_object *obj) +{ + struct iommufd_viommu *viommu = + container_of(obj, struct iommufd_viommu, obj); + + if (viommu->ops && viommu->ops->free) + viommu->ops->free(viommu); + refcount_dec(&viommu->hwpt->common.obj.users); +} + +int iommufd_viommu_alloc_ioctl(struct iommufd_ucmd *ucmd) +{ + struct iommu_viommu_alloc *cmd = ucmd->cmd; + struct iommufd_hwpt_paging *hwpt_paging; + struct iommu_device *iommu_dev; + struct iommufd_viommu *viommu; + struct iommufd_device *idev; + int rc; + + if (cmd->flags) + return -EOPNOTSUPP; + + idev = iommufd_get_device(ucmd, cmd->dev_id); + if (IS_ERR(idev)) + return PTR_ERR(idev); + iommu_dev = idev->dev->iommu->iommu_dev; + + if (!iommu_dev->ops->viommu_alloc) { + rc = -EOPNOTSUPP; + goto out_put_idev; + } + + hwpt_paging = iommufd_get_hwpt_paging(ucmd, cmd->hwpt_id); + if (IS_ERR(hwpt_paging)) { + rc = PTR_ERR(hwpt_paging); + goto out_put_idev; + } + + if (!hwpt_paging->nest_parent) { + rc = -EINVAL; + goto out_put_hwpt; + } + + viommu = iommu_dev->ops->viommu_alloc(idev->dev, cmd->type, + hwpt_paging->common.domain); + if (IS_ERR(viommu)) { + rc = PTR_ERR(viommu); + goto out_put_hwpt; + } + + /* iommufd_object_finalize will store the viommu->obj.id */ + rc = xa_alloc(&ucmd->ictx->objects, &viommu->obj.id, XA_ZERO_ENTRY, + xa_limit_31b, GFP_KERNEL_ACCOUNT); + if (rc) + goto out_free; + + viommu->obj.type = IOMMUFD_OBJ_VIOMMU; + viommu->type = cmd->type; + + viommu->ictx = ucmd->ictx; + viommu->hwpt = hwpt_paging; + viommu->iommu_dev = idev->dev->iommu->iommu_dev; + cmd->out_viommu_id = viommu->obj.id; + rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd)); + if (rc) + goto out_erase_xa; + iommufd_object_finalize(ucmd->ictx, &viommu->obj); + refcount_inc(&viommu->hwpt->common.obj.users); + goto out_put_hwpt; + +out_erase_xa: + xa_erase(&ucmd->ictx->objects, viommu->obj.id); +out_free: + if (viommu->ops && viommu->ops->free) + viommu->ops->free(viommu); + kfree(viommu); +out_put_hwpt: + iommufd_put_object(ucmd->ictx, &hwpt_paging->common.obj); +out_put_idev: + iommufd_put_object(ucmd->ictx, &idev->obj); + return rc; +} diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 650acfac307a..dec10c6bb261 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -28,6 +28,7 @@ enum iommufd_object_type { IOMMUFD_OBJ_HWPT_NESTED, IOMMUFD_OBJ_IOAS, IOMMUFD_OBJ_ACCESS, + IOMMUFD_OBJ_VIOMMU, #ifdef CONFIG_IOMMUFD_TEST IOMMUFD_OBJ_SELFTEST, #endif diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index 1dfeaa2e649e..2b0825d69846 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -50,6 +50,7 @@ enum { IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING, IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP, IOMMUFD_CMD_HWPT_INVALIDATE, + IOMMUFD_CMD_VIOMMU_ALLOC, }; /** @@ -692,4 +693,33 @@ struct iommu_hwpt_invalidate { __u32 __reserved; }; #define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE) + +/** + * enum iommu_viommu_type - VIOMMU Type + * @IOMMU_VIOMMU_TEGRA241_CMDQV: NVIDIA Tegra241 CMDQV Extension for SMMUv3 + */ +enum iommu_viommu_type { + IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV, +}; + +/** + * struct iommu_viommu_alloc - ioctl(IOMMU_VIOMMU_ALLOC) + * @size: sizeof(struct iommu_viommu_alloc) + * @flags: Must be 0 + * @type: Type of the VIOMMU object. Must be defined in enum iommu_viommu_type + * @dev_id: The device to allocate this virtual IOMMU for + * @hwpt_id: ID of a nested parent HWPT + * @out_viommu_id: Output virtual IOMMU ID for the allocated object + * + * Allocate an virtual IOMMU object that holds a (shared) nested parent HWPT + */ +struct iommu_viommu_alloc { + __u32 size; + __u32 flags; + __u32 type; + __u32 dev_id; + __u32 hwpt_id; + __u32 out_viommu_id; +}; +#define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC) #endif