From patchwork Mon Jun 13 17:46:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Suchanek X-Patchwork-Id: 9173693 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2C2A960573 for ; Mon, 13 Jun 2016 17:49:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 229CB20410 for ; Mon, 13 Jun 2016 17:49:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 170F025404; Mon, 13 Jun 2016 17:49:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A717C20410 for ; Mon, 13 Jun 2016 17:49:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bCVxs-0004Dg-27; Mon, 13 Jun 2016 17:47:56 +0000 Received: from dec59.ruk.cuni.cz ([2001:718:1e03:4::11]) by bombadil.infradead.org with smtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bCVxF-0003uE-U6 for linux-arm-kernel@lists.infradead.org; Mon, 13 Jun 2016 17:47:19 +0000 Received: (qmail 53083 invoked by uid 2313); 13 Jun 2016 17:46:50 -0000 Date: 13 Jun 2016 17:46:50 -0000 MBOX-Line: From 3bf00d7311a7ed5f5d71125b7b652175551061b6 Mon Sep 17 00:00:00 2001 Message-Id: <3bf00d7311a7ed5f5d71125b7b652175551061b6.1465490774.git.hramrach@gmail.com> In-Reply-To: References: From: Michal Suchanek Subject: [PATCH v3 05/13] spi: sun6i: update CS handling from spi-sun4i To: linux-sunxi@googlegroups.com, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Maxime Ripard , Chen-Yu Tsai , Russell King , Mark Brown , Michal Suchanek , Arnd Bergmann , Olof Johansson , Krzysztof Kozlowski , Javier Martinez Canillas , Simon Horman , Sjoerd Simons , Thierry Reding , Alison Wang , Timo Sigurdsson , Jonathan Liu , Gerhard Bertelsmann , Priit Laes , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160613_104718_445625_1F92B857 X-CRM114-Status: GOOD ( 13.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP While trying to merge sun4i and sun6i spi drivers I noticed the sun4i driver seems to have more reasonable CS handling. Update sun6i to same. Signed-off-by: Michal Suchanek --- drivers/spi/spi-sun6i.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index bc29a98..06759d0 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -145,11 +145,30 @@ static void sun6i_spi_set_cs(struct spi_device *spi, bool enable) reg &= ~SUN6I_TFR_CTL_CS_MASK; reg |= SUN6I_TFR_CTL_CS(spi->chip_select); + /* We want to control the chip select manually */ + reg |= SUN6I_TFR_CTL_CS_MANUAL; + if (enable) reg |= SUN6I_TFR_CTL_CS_LEVEL; else reg &= ~SUN6I_TFR_CTL_CS_LEVEL; + /* + * Even though this looks irrelevant since we are supposed to + * be controlling the chip select manually, this bit also + * controls the levels of the chip select for inactive + * devices. + * + * If we don't set it, the chip select level will go low by + * default when the device is idle, which is not really + * expected in the common case where the chip select is active + * low. + */ + if (spi->mode & SPI_CS_HIGH) + reg &= ~SUN6I_TFR_CTL_SPOL; + else + reg |= SUN6I_TFR_CTL_SPOL; + sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg); } @@ -215,9 +234,6 @@ static int sun6i_spi_transfer_one(struct spi_master *master, else reg |= SUN6I_TFR_CTL_DHB; - /* We want to control the chip select manually */ - reg |= SUN6I_TFR_CTL_CS_MANUAL; - sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg); /* Ensure that we have a parent clock fast enough */