diff mbox series

iommu/arm-smmu: Clarify MMU-500 CPRE workaround

Message ID 467590c40029ef0712b1fd38f2928fd4f08d09af.1726232138.git.robin.murphy@arm.com (mailing list archive)
State New, archived
Headers show
Series iommu/arm-smmu: Clarify MMU-500 CPRE workaround | expand

Commit Message

Robin Murphy Sept. 13, 2024, 12:55 p.m. UTC
CPRE workarounds are implicated in at least 5 MMU-500 errata, some of
which remain unfixed. The comment and warning message have proven to be
unhelpfully misleading about this scope, so reword them to get the point
across with less risk of going out of date or confusing users.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Robin Murphy Sept. 13, 2024, 3:13 p.m. UTC | #1
On 2024-09-13 1:55 pm, Robin Murphy wrote:
> CPRE workarounds are implicated in at least 5 MMU-500 errata, some of
> which remain unfixed. The comment and warning message have proven to be
> unhelpfully misleading about this scope, so reword them to get the point
> across with less risk of going out of date or confusing users.
> 
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>   drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
> index 9dc772f2cbb2..2edb1c1658ad 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
> @@ -130,7 +130,7 @@ int arm_mmu500_reset(struct arm_smmu_device *smmu)
>   
>   	/*
>   	 * Disable MMU-500's not-particularly-beneficial next-page
> -	 * prefetcher for the sake of errata #841119 and #826419.
> +	 * prefetcher for the sake of at least 5 known errata.
>   	 */
>   	for (i = 0; i < smmu->num_context_banks; ++i) {
>   		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
> @@ -138,7 +138,7 @@ int arm_mmu500_reset(struct arm_smmu_device *smmu)
>   		arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg);
>   		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
>   		if (reg & ARM_MMU500_ACTLR_CPRE)
> -			dev_warn_once(smmu->dev, "Failed to disable prefetcher [errata #841119 and #826419], check ACR.CACHE_LOCK\n");
> +			dev_warn_once(smmu->dev, "Failed to disable prefetcher for errata workarounds, check ACR.CACHE_LOCK\n");

Come to think of it, this should probably also refer to SACR rather than 
ACR, given that we already *have* attempted to program the Non-Secure 
side...

Robin.

>   	}
>   
>   	return 0;
Will Deacon Oct. 8, 2024, 1:36 p.m. UTC | #2
On Fri, Sep 13, 2024 at 04:13:29PM +0100, Robin Murphy wrote:
> On 2024-09-13 1:55 pm, Robin Murphy wrote:
> > CPRE workarounds are implicated in at least 5 MMU-500 errata, some of
> > which remain unfixed. The comment and warning message have proven to be
> > unhelpfully misleading about this scope, so reword them to get the point
> > across with less risk of going out of date or confusing users.
> > 
> > Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> > ---
> >   drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
> > index 9dc772f2cbb2..2edb1c1658ad 100644
> > --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
> > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
> > @@ -130,7 +130,7 @@ int arm_mmu500_reset(struct arm_smmu_device *smmu)
> >   	/*
> >   	 * Disable MMU-500's not-particularly-beneficial next-page
> > -	 * prefetcher for the sake of errata #841119 and #826419.
> > +	 * prefetcher for the sake of at least 5 known errata.
> >   	 */
> >   	for (i = 0; i < smmu->num_context_banks; ++i) {
> >   		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
> > @@ -138,7 +138,7 @@ int arm_mmu500_reset(struct arm_smmu_device *smmu)
> >   		arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg);
> >   		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
> >   		if (reg & ARM_MMU500_ACTLR_CPRE)
> > -			dev_warn_once(smmu->dev, "Failed to disable prefetcher [errata #841119 and #826419], check ACR.CACHE_LOCK\n");
> > +			dev_warn_once(smmu->dev, "Failed to disable prefetcher for errata workarounds, check ACR.CACHE_LOCK\n");
> 
> Come to think of it, this should probably also refer to SACR rather than
> ACR, given that we already *have* attempted to program the Non-Secure
> side...

I'm happy to pick up a v2 with that change.

Cheers,

Will
diff mbox series

Patch

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
index 9dc772f2cbb2..2edb1c1658ad 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
@@ -130,7 +130,7 @@  int arm_mmu500_reset(struct arm_smmu_device *smmu)
 
 	/*
 	 * Disable MMU-500's not-particularly-beneficial next-page
-	 * prefetcher for the sake of errata #841119 and #826419.
+	 * prefetcher for the sake of at least 5 known errata.
 	 */
 	for (i = 0; i < smmu->num_context_banks; ++i) {
 		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
@@ -138,7 +138,7 @@  int arm_mmu500_reset(struct arm_smmu_device *smmu)
 		arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg);
 		reg = arm_smmu_cb_read(smmu, i, ARM_SMMU_CB_ACTLR);
 		if (reg & ARM_MMU500_ACTLR_CPRE)
-			dev_warn_once(smmu->dev, "Failed to disable prefetcher [errata #841119 and #826419], check ACR.CACHE_LOCK\n");
+			dev_warn_once(smmu->dev, "Failed to disable prefetcher for errata workarounds, check ACR.CACHE_LOCK\n");
 	}
 
 	return 0;