From patchwork Wed Oct 9 16:38:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 13828857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DC37CEE332 for ; Wed, 9 Oct 2024 17:19:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Adhn2ntk7aCGtHZ2wiYuwOVsWCP5l+BSEnYAMVhXZVE=; b=zdZPaOB8kEnPHC3Tg6bSFtdSYC d3z/oQZGmsWs6jQTI8lMp6uEaFe7E/HkcL5X7Vdx9TTNZbZq0ydd1lEgu3ppaUlnk6bwN4wq0X12z jIp8LyeEPwQhlnn7l/igynz7XMnHKEpHNMQQh2VOdpJcDUFot2KLX+/oaTk1QhDzyD5+X2up5ogfa VBxr3x0qcv6MZUJ8jrcZ4tNfojKQ1PBcTXmcW0BFE9aQmrpPQ8GL6FRJA8EddsYAlKE2SdSPM/0cM YGjy2lUb3afcoWNsN06GijmJFnTCj6rlgN9hE+DTkEsc9ISst/i30drqCmBEKgUDtNgyql/EEZkQ3 e9Xom7Ag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1syaLO-0000000A9Sr-19Ki; Wed, 09 Oct 2024 17:19:26 +0000 Received: from mail-co1nam11on20600.outbound.protection.outlook.com ([2a01:111:f403:2416::600] helo=NAM11-CO1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1syZii-0000000A0fs-1aAJ for linux-arm-kernel@lists.infradead.org; Wed, 09 Oct 2024 16:39:30 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=IqLlaYlpK7bGam83dYa8+3SleejDfblM6O1DRPCfrtxSyhkGsnlEuV3eofh8ArMd9rKG+46lozT0LJYDfGOY7iNWPc9dqgJf6GCI2PwiSZkthDFv5C/5rueW1MXfNa2mmke4bgAEIXFxypldt8THeoIcBrdjsbDPePIixOftkzPcSaIiXAl/+NLNWXonwThntJRANNGGMrfE91sRjd8YoWqoqvagHrEVnC/56WrG6X1TIQ6uwxxvhzAgqOqhekWBTV41fPOJ1imWWwFl6eywBEYGv2Go7gQeYB7lHWN+UDQNPM7LFqaFChnnzRvpCyztRNkopQDYAKTTIvExeabPyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Adhn2ntk7aCGtHZ2wiYuwOVsWCP5l+BSEnYAMVhXZVE=; b=xRlbEl3UZgQmbphiL9B4XyZSYxrZi3M7Ph24vGnUDLcV54CDYrVNOksZku+RHeAx+E9xhZ1zJl+j1rV0mMiy3sRrGRprcxU6netmU5j7dBHD9DdjocIWAelz6t4Qg78NXjpLArDyyxKSck3KOyR9yk8hnceHlg8o1CPKoz0e0hjQRao6zNXiOphuMM4GVhAQBiOftKoST+z+DTLX54fAZUi3HwYbWOQrWQCT4IFOQ5En3dd5eibwE5AfhHodq7e9zUFxHzsbbDqPIbiO3JG9drbx6NKSf+saz1csDnc1xP47Mp+icH+IrKhwknn2zfdj/KRuhKrN7JN9gqKNCDwWhA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Adhn2ntk7aCGtHZ2wiYuwOVsWCP5l+BSEnYAMVhXZVE=; b=R79tyU9OVw6JysBxVygTen/PpK3J7rRFuJYcTiFjJrlz2i2TpRl3lxnbIV2JuGozGa67vTOpynN83haDZGWyWMWpAdtMG8FuX7vv2PE3ewJq4x1pXLUxdDn11wBH+cPrWm9gcCaEVIzF4Eoeu3GBulDnTlxjlRhh3B1N/YG+MCmFmaVmGu+9eYfZaubmZqHIuYdj7LfR/R7awmAUc6wAgeTAi7Aa1kam3dP9oN1SO9Mon/fsv1suoDgZtorse5Jd/xbxHPhuuonoK6jS07pEhcrde/9JuZJ11KkV9XG25U3uv20gyQ0Rzz4tAllP5TeTyB0WWIxkprSNWFbvtJBlEw== Received: from DS7P220CA0003.NAMP220.PROD.OUTLOOK.COM (2603:10b6:8:1ca::17) by DS7PR12MB6005.namprd12.prod.outlook.com (2603:10b6:8:7c::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.23; Wed, 9 Oct 2024 16:39:17 +0000 Received: from DS3PEPF000099E2.namprd04.prod.outlook.com (2603:10b6:8:1ca:cafe::7b) by DS7P220CA0003.outlook.office365.com (2603:10b6:8:1ca::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.18 via Frontend Transport; Wed, 9 Oct 2024 16:39:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by DS3PEPF000099E2.mail.protection.outlook.com (10.167.17.201) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.13 via Frontend Transport; Wed, 9 Oct 2024 16:39:17 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 9 Oct 2024 09:39:09 -0700 Received: from drhqmail202.nvidia.com (10.126.190.181) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 9 Oct 2024 09:39:09 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Wed, 9 Oct 2024 09:39:08 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 10/16] iommufd/selftest: Add mock_viommu_cache_invalidate Date: Wed, 9 Oct 2024 09:38:22 -0700 Message-ID: <4a080b2ad3c543a09b01bd021ff7d3fbc5294ce4.1728491532.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099E2:EE_|DS7PR12MB6005:EE_ X-MS-Office365-Filtering-Correlation-Id: f20e77ce-b3d2-49b8-795a-08dce880eb0e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|7416014|82310400026; X-Microsoft-Antispam-Message-Info: ptxMRwfCmo0q591pqhXS9njqQBiIZ2pZZQY0f8VGwvVG92dKMA9UFw1uitMl8l7HZr8grEvRLhaqo/SdPuyhUClVocartmFDrMdvBKxLt8PHT18DPlCe00BFQ1fvnBrLRN5RuuQYxa7FDVkmPZpgbgh0Yj/XSLuXAZFhtV2wS8I/2O+gOrzsEr9PDQYNSTrIMLMkFRMV3cpm+rQt7x4Tt/z6ZVpe2iSbSo8o4hx4yYaskySIEBtZv3Zn2lDaVGEsDrVbWOvOoBKhstsF3tP8LkRsC6f+DZcYgtRJzvbnW/9W3heoWfR9drpo7mw/7a68x6E1yvFqC7vOrrJvHPzLmir+/+ArFX1f7HIaK4IeOaLvmFxeBPVIo/6oI/YVNh5NFGwzXj77GyoZOta6aOUOp3vhi2n3p0h1PUfSej/E0a20NIq/Nt7UeOUQp2kw+MRoQkJRKC/BOUPjGeTtP4BYJO8sMrITiW0w+SiDerTh9z8mFvbug4VwypWMPyHl2abSuMUM08OJjdyV9BVfxSuV/zEB4ILiAMZ0VhDsIkaGmU1H6sO4vLQGGuWj1Qm8feH+t3P1Bm1q/ZBxevDLwg+M8MfD2LggVN8XnvJc/fUsVaF3anGrjo2lEnKpzwoKucpe3DIWEoI13RZGRa1y89TrtgG847s9HTK2HLDfyrDgmob7AJyCgQexuCculkb1DjfUZz1dVDqu20bmzhayFA09vmaBBEVWGcnYylOs7jibLmscj3QeoQ46/FnMpwhzcRvktETFXZ9DllBLlF0RbR0ljSyZYCfAFePmbIeDJPR+pyObUnTz0VvjcXQO5hbED2kkao6A3yNIxUKg5zrOCDEVtc3PDyRRDOXBKWzsgoGi/fvNMAUlAB05YqmREpB2hOdFwAE+eCCMYbTEninMv47mjK3f9OP4gZf/620wXZCN36556Uhazh4uQTalc4FmP6d3ENSYJObZi3zmeFXE3Z7TMg6rfLHz7n/v4tjiHZjRSDl874SJA47RXL93YFV6BJ/T8aUCVD9tf3/+YWc+PSID+4Q4F7EJkNIDi9k/wgLnAJMyN6IY9Ob3OkwaMRZOdtfUdG+koZc+v9euBNCej6dZbNe+alCZoMIgr2EkCNTf9dA2q+aLS0Qj48lSfXFeLKOWSU7ZM+2qzPSOrDoeTr/X/Atfo8wgZjkclZ2IaYA9nsneVBi+bF7AMaOF+WDo7Sh27OMtCnaFXKuJkCNtoHhXdSopjaXKNzAen+28Ma69bXvfTC7F6g2A5Rcir3N7ijQyh0b6mZu+af0ddb7jPCr4eqE/pD95B6XQcr4qb8ZU6scBI/rdz9/p3H1ARovcdCt28Or37N1slNWyg9aDvoovpk+r/z4Ax7AT0056ggtlr+8dy6TR1dygzB6t66molKFA X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(7416014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2024 16:39:17.5413 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f20e77ce-b3d2-49b8-795a-08dce880eb0e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099E2.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6005 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241009_093928_447471_BA57F3B9 X-CRM114-Status: GOOD ( 22.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Similar to the coverage of cache_invalidate_user for iotlb invalidation, add a device cache and a viommu_cache_invalidate function to test it out. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_test.h | 25 +++++++++ drivers/iommu/iommufd/selftest.c | 79 +++++++++++++++++++++++++++- 2 files changed, 103 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/iommufd/iommufd_test.h b/drivers/iommu/iommufd/iommufd_test.h index edced4ac7cd3..05f57a968d25 100644 --- a/drivers/iommu/iommufd/iommufd_test.h +++ b/drivers/iommu/iommufd/iommufd_test.h @@ -54,6 +54,11 @@ enum { MOCK_NESTED_DOMAIN_IOTLB_NUM = 4, }; +enum { + MOCK_DEV_CACHE_ID_MAX = 3, + MOCK_DEV_CACHE_NUM = 4, +}; + struct iommu_test_cmd { __u32 size; __u32 op; @@ -152,6 +157,7 @@ struct iommu_test_hw_info { /* Should not be equal to any defined value in enum iommu_hwpt_data_type */ #define IOMMU_HWPT_DATA_SELFTEST 0xdead #define IOMMU_TEST_IOTLB_DEFAULT 0xbadbeef +#define IOMMU_TEST_DEV_CACHE_DEFAULT 0xbaddad /** * struct iommu_hwpt_selftest @@ -182,4 +188,23 @@ struct iommu_hwpt_invalidate_selftest { #define IOMMU_VIOMMU_TYPE_SELFTEST 0xdeadbeef +/* Should not be equal to any defined value in enum iommu_viommu_invalidate_data_type */ +#define IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST 0xdeadbeef +#define IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST_INVALID 0xdadbeef + +/** + * struct iommu_viommu_invalidate_selftest - Invalidation data for Mock VIOMMU + * (IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST) + * @flags: Invalidate flags + * @cache_id: Invalidate cache entry index + * + * If IOMMU_TEST_INVALIDATE_ALL is set in @flags, @cache_id will be ignored + */ +struct iommu_viommu_invalidate_selftest { +#define IOMMU_TEST_INVALIDATE_FLAG_ALL (1 << 0) + __u32 flags; + __u32 vdev_id; + __u32 cache_id; +}; + #endif diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selftest.c index 87bc45b86f9e..8a1aef857922 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -149,6 +149,7 @@ struct mock_dev { struct device dev; unsigned long flags; int id; + u32 cache[MOCK_DEV_CACHE_NUM]; }; struct selftest_obj { @@ -578,9 +579,80 @@ static struct iommufd_vdevice *mock_vdevice_alloc(struct iommufd_viommu *viommu, return &mock_vdev->core; } +static int mock_viommu_cache_invalidate(struct iommufd_viommu *viommu, + struct iommu_user_data_array *array) +{ + struct iommu_viommu_invalidate_selftest *cmds; + struct iommu_viommu_invalidate_selftest *cur; + struct iommu_viommu_invalidate_selftest *end; + int rc; + + /* A zero-length array is allowed to validate the array type */ + if (array->entry_num == 0 && + array->type == IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST) { + array->entry_num = 0; + return 0; + } + + cmds = kcalloc(array->entry_num, sizeof(*cmds), GFP_KERNEL); + if (!cmds) + return -ENOMEM; + cur = cmds; + end = cmds + array->entry_num; + + static_assert(sizeof(*cmds) == 3 * sizeof(u32)); + rc = iommu_copy_struct_from_full_user_array( + cmds, sizeof(*cmds), array, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST); + if (rc) + goto out; + + while (cur != end) { + XA_STATE(xas, &viommu->vdevs, (unsigned long)cur->vdev_id); + struct mock_dev *mdev; + struct device *dev; + int i; + + if (cur->flags & ~IOMMU_TEST_INVALIDATE_FLAG_ALL) { + rc = -EOPNOTSUPP; + goto out; + } + + if (cur->cache_id > MOCK_DEV_CACHE_ID_MAX) { + rc = -EINVAL; + goto out; + } + + xa_lock(&viommu->vdevs); + dev = vdev_to_dev(xas_load(&xas)); + if (!dev) { + xa_unlock(&viommu->vdevs); + rc = -EINVAL; + goto out; + } + mdev = container_of(dev, struct mock_dev, dev); + + if (cur->flags & IOMMU_TEST_INVALIDATE_FLAG_ALL) { + /* Invalidate all cache entries and ignore cache_id */ + for (i = 0; i < MOCK_DEV_CACHE_NUM; i++) + mdev->cache[i] = 0; + } else { + mdev->cache[cur->cache_id] = 0; + } + xa_unlock(&viommu->vdevs); + + cur++; + } +out: + array->entry_num = cur - cmds; + kfree(cmds); + return rc; +} + static struct iommufd_viommu_ops mock_viommu_ops = { .free = mock_viommu_free, .vdevice_alloc = mock_vdevice_alloc, + .cache_invalidate = mock_viommu_cache_invalidate, }; static struct iommufd_viommu * @@ -627,6 +699,9 @@ static const struct iommu_ops mock_ops = { .dev_disable_feat = mock_dev_disable_feat, .user_pasid_table = true, .viommu_alloc = mock_viommu_alloc, + .default_viommu_ops = &(struct iommufd_viommu_ops){ + .cache_invalidate = mock_viommu_cache_invalidate, + }, .default_domain_ops = &(struct iommu_domain_ops){ .free = mock_domain_free, @@ -759,7 +834,7 @@ static void mock_dev_release(struct device *dev) static struct mock_dev *mock_dev_create(unsigned long dev_flags) { struct mock_dev *mdev; - int rc; + int rc, i; if (dev_flags & ~(MOCK_FLAGS_DEVICE_NO_DIRTY | MOCK_FLAGS_DEVICE_HUGE_IOVA)) @@ -773,6 +848,8 @@ static struct mock_dev *mock_dev_create(unsigned long dev_flags) mdev->flags = dev_flags; mdev->dev.release = mock_dev_release; mdev->dev.bus = &iommufd_mock_bus_type.bus; + for (i = 0; i < MOCK_DEV_CACHE_NUM; i++) + mdev->cache[i] = IOMMU_TEST_DEV_CACHE_DEFAULT; rc = ida_alloc(&mock_dev_ida, GFP_KERNEL); if (rc < 0)