From patchwork Fri Aug 17 08:11:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Wang X-Patchwork-Id: 1337821 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 447CA3FC71 for ; Fri, 17 Aug 2012 08:15:38 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T2Hfb-0007oS-Hh; Fri, 17 Aug 2012 08:12:39 +0000 Received: from mail.windriver.com ([147.11.1.11]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T2HfX-0007oA-EE for linux-arm-kernel@lists.infradead.org; Fri, 17 Aug 2012 08:12:36 +0000 Received: from ALA-HCA.corp.ad.wrs.com (ala-hca [147.11.189.40]) by mail.windriver.com (8.14.5/8.14.3) with ESMTP id q7H8CBev005899 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL); Fri, 17 Aug 2012 01:12:12 -0700 (PDT) Received: from [128.224.163.220] (128.224.163.220) by ALA-HCA.corp.ad.wrs.com (147.11.189.50) with Microsoft SMTP Server (TLS) id 14.2.309.2; Fri, 17 Aug 2012 01:12:11 -0700 Message-ID: <502DFCB4.9050502@gmail.com> Date: Fri, 17 Aug 2012 16:11:32 +0800 From: Hui Wang User-Agent: Thunderbird 2.0.0.24 (X11/20101027) MIME-Version: 1.0 To: Shawn Guo Subject: Re: imx6q restart is broken References: <20120808101817.GA14718@S2101-09.ap.freescale.net> <50224547.9020000@de.bosch.com> <50232C17.9000700@gmail.com> <20120809092021.GQ18957@n2100.arm.linux.org.uk> <502BBB43.5010403@gmail.com> <20120815214412.GC32560@n2100.arm.linux.org.uk> <20120816023109.GH2258@S2101-09.ap.freescale.net> <20120816223446.GB15883@n2100.arm.linux.org.uk> <20120817034854.GE24242@S2101-09.ap.freescale.net> In-Reply-To: <20120817034854.GE24242@S2101-09.ap.freescale.net> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [147.11.1.11 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (jason77.wang[at]gmail.com) 0.0 DKIM_ADSP_CUSTOM_MED No valid author signature, adsp_override is CUSTOM_MED 0.8 SPF_NEUTRAL SPF: sender does not match SPF record (neutral) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.9 NML_ADSP_CUSTOM_MED ADSP custom_med hit, and not from a mailing list Cc: Hui Wang , Russell King - ARM Linux , Catalin Marinas , Sascha Hauer , Dirk Behme , "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Shawn Guo wrote: > On Thu, Aug 16, 2012 at 11:34:46PM +0100, Russell King - ARM Linux wrote: > >> This doesn't get around the problem that userspace can still effectively >> issue a DoS against the system by just running a dmb in a tight loop. >> Or maybe this would have a much more dramatic effect: >> >> while (1) { >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> asm("dmb"); >> } >> >> and make that 3 seconds to get a ps listing turn into something much >> longer? >> >> > >From my testing, no, it does not get the thing even worse. > > >> I think what needs to happen here (while we wait) is someone _with_ the >> problem needs to experiment, and find out how many nops are needed for >> the DMB not to have much effect in cpu_relax(). If it turns out we just >> need to put one nop in, then that's not _too_ bad. >> > > At least, I need to have 5 nops to get rid of the issue, something like > below. > > Regards, > Shawn > > --8<--- > > diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h > index 99afa74..3e1b099 100644 > --- a/arch/arm/include/asm/processor.h > +++ b/arch/arm/include/asm/processor.h > @@ -80,7 +80,14 @@ extern void release_thread(struct task_struct *); > unsigned long get_wchan(struct task_struct *p); > > #if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327) > -#define cpu_relax() smp_mb() > +#define cpu_relax() do { \ > + asm("nop"); \ > + asm("nop"); \ > + asm("nop"); \ > + asm("nop"); \ > + asm("nop"); \ > + smp_mb(); \ > + } while (0) > #else > #define cpu_relax() barrier() > #endif > > > In my test, if the number of nops is equal or more than 4, the reset can work fine. diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h index 0511238..3ad4258 100644 --- a/arch/arm/include/asm/barrier.h +++ b/arch/arm/include/asm/barrier.h @@ -22,7 +22,11 @@ : : "r" (0) : "memory") #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ : : "r" (0) : "memory") -#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ +#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5\n" \ + "nop\n" \ + "nop\n" \ + "nop\n" \ + "nop\n" \ : : "r" (0) : "memory")