diff mbox

at91sam9260.dtsi: fix u(s)art pinctrl encoding

Message ID 515D7A4F.90707@interlog.com (mailing list archive)
State New, archived
Headers show

Commit Message

Douglas Gilbert April 4, 2013, 1:04 p.m. UTC
A pattern is emerging with sloppy at91 dts(i) files
with pinctrls: the comments are correct and the
corresponding encoding is wrong. The other example that
I fixed was at91sam9x5.dtsi . Makes you wonder how many
people are using this DT stuff in anger ...

This problem was found with AT91SAM9G20 SoCs (Acme's FoxG20).
The attached is against lk 3.9.0-rc5 .

Doug Gilbert

Comments

Nicolas Ferre April 4, 2013, 4:04 p.m. UTC | #1
On 04/04/2013 03:04 PM, Douglas Gilbert :

> A pattern is emerging with sloppy at91 dts(i) files
> with pinctrls: the comments are correct and the
> corresponding encoding is wrong. The other example that
> I fixed was at91sam9x5.dtsi . Makes you wonder how many
> people are using this DT stuff in anger ...
> 
> This problem was found with AT91SAM9G20 SoCs (Acme's FoxG20).
> The attached is against lk 3.9.0-rc5 .


>  
>  					pinctrl_usart3_rts: usart3_rts-0 {
>  						atmel,pins =
> -							<3 8 0x2 0x0>;	/* PB8 periph B */
> +							<1 8 0x2 0x0>;	/* PB8 periph B */

Here both the comment and the encoding were wrong:
it is PC8 periph B ==> <2 8 0x2  0x0>

>  					};
>  
>  					pinctrl_usart3_cts: usart3_cts-0 {
>  						atmel,pins =
> -							<3 10 0x2 0x0>;	/* PB10 periph B */
> +							<1 10 0x2 0x0>;	/* PB10 periph B */

Same here:
it is PC10 periph B ==> <2 10 0x2  0x0>

>  					};
>  				};

I correct this in your patch and submit it right now.

Thanks, best regards,
diff mbox

Patch

diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 39253b9..430c06d 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -158,8 +158,8 @@ 
 				usart1 {
 					pinctrl_usart1: usart1-0 {
 						atmel,pins =
-							<2 6 0x1 0x1	/* PB6 periph A with pullup */
-							 2 7 0x1 0x0>;	/* PB7 periph A */
+							<1 6 0x1 0x1	/* PB6 periph A with pullup */
+							 1 7 0x1 0x0>;	/* PB7 periph A */
 					};
 
 					pinctrl_usart1_rts: usart1_rts-0 {
@@ -194,18 +194,18 @@ 
 				usart3 {
 					pinctrl_usart3: usart3-0 {
 						atmel,pins =
-							<2 10 0x1 0x1	/* PB10 periph A with pullup */
-							 2 11 0x1 0x0>;	/* PB11 periph A */
+							<1 10 0x1 0x1	/* PB10 periph A with pullup */
+							 1 11 0x1 0x0>;	/* PB11 periph A */
 					};
 
 					pinctrl_usart3_rts: usart3_rts-0 {
 						atmel,pins =
-							<3 8 0x2 0x0>;	/* PB8 periph B */
+							<1 8 0x2 0x0>;	/* PB8 periph B */
 					};
 
 					pinctrl_usart3_cts: usart3_cts-0 {
 						atmel,pins =
-							<3 10 0x2 0x0>;	/* PB10 periph B */
+							<1 10 0x2 0x0>;	/* PB10 periph B */
 					};
 				};
 
@@ -220,8 +220,8 @@ 
 				uart1 {
 					pinctrl_uart1: uart1-0 {
 						atmel,pins =
-							<2 12 0x1 0x1	/* PB12 periph A with pullup */
-							 2 13 0x1 0x0>;	/* PB13 periph A */
+							<1 12 0x1 0x1	/* PB12 periph A with pullup */
+							 1 13 0x1 0x0>;	/* PB13 periph A */
 					};
 				};