From patchwork Thu Nov 27 20:16:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Thompson X-Patchwork-Id: 5399641 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 16E7A9F11E for ; Thu, 27 Nov 2014 20:18:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4DA78201B4 for ; Thu, 27 Nov 2014 20:18:51 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 542BF2015E for ; Thu, 27 Nov 2014 20:18:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xu5Ui-00029f-2R; Thu, 27 Nov 2014 20:16:52 +0000 Received: from mail-wi0-f182.google.com ([209.85.212.182]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xu5US-0001r3-GJ for linux-arm-kernel@lists.infradead.org; Thu, 27 Nov 2014 20:16:37 +0000 Received: by mail-wi0-f182.google.com with SMTP id h11so9327020wiw.9 for ; Thu, 27 Nov 2014 12:16:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:message-id:date:from:user-agent:mime-version:to :cc:subject:references:in-reply-to:content-type :content-transfer-encoding; bh=KbQPIHOkDNgRpsYOaMmiPHdsspmKj/7npMIJSOvMmHs=; b=SiN0Ev0pVZHj4k1WRpeCbXgAddplEpauwCgqIStQIrivYRwfCMb9DzAQpllUzEkXuG S99O5rKYfUg9r2VLDG6WgefTKrzFghIFrZ+LUCZqwcH6BW4t73utxPYnsSWOLMrWIksM 6fa3seoPWIVKf+S84N7cIJ819Zm5HkPN8pDcuAE7vXH6nSCjboAGdIwaF0Xi0kDvQ1Lz n8Qyes47d7C+Iw1vVBEwBMXJPE/ESGJPT2t/SWRJ4IIKLpoF0d/Eji+5HEWr4K72rCv3 EIhYAc/4zNzNrgTKL8+3jtXsfJuRRVRgSZbgdKvAtb1J4MoUuf07jv8y5iwoRzwf86nH V6lw== X-Gm-Message-State: ALoCoQmDWRSH0cZGEISo6P7BQ5fokR68S76/sQoqGpw39xTWFjoThGvja3XK0X0lCWqxcXgqFu6D X-Received: by 10.194.192.40 with SMTP id hd8mr16648588wjc.46.1417119373376; Thu, 27 Nov 2014 12:16:13 -0800 (PST) Received: from harvey.bri.st.com (cpc4-aztw19-0-0-cust157.18-1.cable.virginm.net. [82.33.25.158]) by mx.google.com with ESMTPSA id dc8sm13021038wib.7.2014.11.27.12.16.11 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Nov 2014 12:16:12 -0800 (PST) Message-ID: <54778685.2070108@linaro.org> Date: Thu, 27 Nov 2014 20:16:05 +0000 From: Daniel Thompson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Jason Cooper Subject: Re: [PATCH 3.18-rc4 v10 4/6] irqchip: gic: Introduce plumbing for IPI FIQ References: <1415968543-29469-1-git-send-email-daniel.thompson@linaro.org> <1417019010-9220-1-git-send-email-daniel.thompson@linaro.org> <1417019010-9220-5-git-send-email-daniel.thompson@linaro.org> <20141126174204.GK22670@titan.lakedaemon.net> <54772975.9090908@linaro.org> <20141127180633.GM22670@titan.lakedaemon.net> <54777EA1.3030508@linaro.org> In-Reply-To: <54777EA1.3030508@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141127_121636_730096_307EEF46 X-CRM114-Status: GOOD ( 22.80 ) X-Spam-Score: -0.7 (/) Cc: linaro-kernel@lists.linaro.org, Russell King , patches@linaro.org, Marc Zyngier , Stephen Boyd , linux-kernel@vger.kernel.org, Daniel Drake , Dmitry Pervushin , Dirk Behme , John Stultz , Tim Sander , Thomas Gleixner , Sumit Semwal , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 27/11/14 19:42, Daniel Thompson wrote: >> Hmm, I'd look at that as a performance enhancement. I'm more concerned >> about performance regressions for current users of the gic (non-group >> enabled). > > "Current users of the gic" doesn't imply "non-group enabled". Whether or > not grouping is enabled is a property of the hardware or (secure) > bootloader. > > If we are seriously worried about a performance regression here we > actually have to care about both cases. > > >> Let's go ahead and do the change (well, a working facsimile) I suggested >> above, and we can do a follow on patch to increase performance for the >> group enabled use case. > > Hmnnn... > > I've have a new patch ready to go that shadows the IGROUP[0]. Its looks > OK to me and I think it is actually fewer lines of code than v10 because > we can remove gic_get_group_irq() completely. Fianlly from me. If you are worried about large "last minute changes" involved in v11 here is the v10 -> v11 diff. u32 grp_val; @@ -395,25 +397,14 @@ static void gic_set_group_irq(void __iomem *base, unsigned int hwirq, } writel_relaxed(grp_val, base + GIC_DIST_IGROUP + grp_reg); + if (grp_reg == 0) + gic->igroup0_shadow = grp_val; + writel_relaxed(pri_val, base + GIC_DIST_PRI + pri_reg); raw_spin_unlock(&irq_controller_lock); } -/* - * Test which group an interrupt belongs to. - * - * Returns 0 if the controller does not support grouping. - */ -static int gic_get_group_irq(void __iomem *base, unsigned int hwirq) -{ - unsigned int grp_reg = hwirq / 32 * 4; - u32 grp_val; - - grp_val = readl_relaxed(base + GIC_DIST_IGROUP + grp_reg); - - return (grp_val >> (hwirq % 32)) & 1; -} /* * Fully acknowledge (both ack and eoi) any outstanding FIQ-based IPI, @@ -565,8 +556,9 @@ static void gic_cpu_init(struct gic_chip_data *gic) if (GICD_ENABLE_GRP1 & readl_relaxed(dist_base + GIC_DIST_CTRL)) { secure_irqs = SMP_IPI_FIQ_MASK; writel_relaxed(~secure_irqs, dist_base + GIC_DIST_IGROUP + 0); + gic->igroup0_shadow = ~secure_irqs; for_each_set_bit(secure_irq, &secure_irqs, 16) - gic_set_group_irq(dist_base, secure_irq, 0); + gic_set_group_irq(gic, secure_irq, 0); } writel_relaxed(GICC_INT_PRI_THRESHOLD, base + GIC_CPU_PRIMASK); @@ -801,10 +793,12 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) */ dmb(ishst); - /* this always happens on GIC0 */ + /* We avoid a readl here by using the shadow copy of IGROUP[0] */ softint = map << 16 | irq; - if (gic_get_group_irq(gic_data_dist_base(&gic_data[0]), irq)) + if (gic_data[0].igroup0_shadow & BIT(irq)) softint |= 0x8000; + + /* This always happens on GIC0 */ writel_relaxed(softint, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 978e5e48d5c1..5c36aefa67ea 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -70,6 +70,7 @@ struct gic_chip_data { #endif struct irq_domain *domain; unsigned int gic_irqs; + u32 igroup0_shadow; #ifdef CONFIG_GIC_NON_BANKED void __iomem *(*get_base)(union gic_base *); #endif @@ -363,9 +364,10 @@ static struct irq_chip gic_chip = { * If is safe to call this function on systems which do not support * grouping (it will have no effect). */ -static void gic_set_group_irq(void __iomem *base, unsigned int hwirq, - int group) +static void gic_set_group_irq(struct gic_chip_data *gic, unsigned int hwirq, + int group) { + void __iomem *base = gic_data_dist_base(gic); unsigned int grp_reg = hwirq / 32 * 4; u32 grp_mask = BIT(hwirq % 32);