From patchwork Sat Jan 31 08:32:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsahee Zidenberg X-Patchwork-Id: 5754091 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AC2A8BF440 for ; Sat, 31 Jan 2015 08:36:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8E74320219 for ; Sat, 31 Jan 2015 08:36:40 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D3E4220225 for ; Sat, 31 Jan 2015 08:36:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YHTUm-0003Po-Uf; Sat, 31 Jan 2015 08:33:36 +0000 Received: from mail-wg0-f53.google.com ([74.125.82.53]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YHTU6-0002y1-LX for linux-arm-kernel@lists.infradead.org; Sat, 31 Jan 2015 08:32:56 +0000 Received: by mail-wg0-f53.google.com with SMTP id a1so30495725wgh.12 for ; Sat, 31 Jan 2015 00:32:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:user-agent :mime-version:content-type:content-transfer-encoding; bh=va1esbwC7tTqsPT+G4qpqd/wRtkjKqCkoSpQD0RZ1Vk=; b=MYi7YZ1vWcaSpz3O0V1o6v2v97pqJZR+DqumkXoyFM72G3cXxNWNnEjkdVirCuPHML cqYWTe6CZuP6C95PkN+gt0Js/FZhMNC4dgEfXRe7T282eW8Vnw9GqUdXW5XEO/uQpBlm XFbZnVEcmPHjxh8rBLPMM3A+hvporkDYgHOdIggKS5SNIeTiWqrQEDnNKOqqAj6PCYPc uKuJGtVYcd81DsOGAWagb1Swq7uuU5BWQESfbItB6K++8P2IUcJpzbJ1WOYNS00fAB3W Em2tRCXpRquLVDNPz7yXIuZDUnIMS6TCDX8+WKSXp2AABceQSl8Hw6rfiQ6otVHRgAIO yqPw== X-Gm-Message-State: ALoCoQmhd8uBeTNg0qxp1PjKWG9SMVqDiR9KTfPo2HyzdhN+Q/PXx1SMknhBWOpfBak6IUaiNSnf X-Received: by 10.180.103.170 with SMTP id fx10mr2656928wib.24.1422693153080; Sat, 31 Jan 2015 00:32:33 -0800 (PST) Received: from localhost (46-116-246-102.bb.netvision.net.il. [46.116.246.102]) by mx.google.com with ESMTPSA id n6sm18296427wjy.8.2015.01.31.00.32.31 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sat, 31 Jan 2015 00:32:32 -0800 (PST) Date: Sat, 31 Jan 2015 10:32:29 +0200 From: Tsahee Zidenberg To: linux-arm-kernel@lists.infradead.org, barak@annapurnalabs.com, saeed@annapurnalabs.com, rshitrit@annapurnalabs.com Subject: [PATCH v2 3/5] ARM: Alpine: smp support Message-ID: <54cc931d.9PqMlkwMeqHvUr4h%tsahee@annapurnalabs.com> User-Agent: Heirloom mailx 12.5 6/20/10 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150131_003255_049097_5329EEAE X-CRM114-Status: GOOD ( 15.43 ) X-Spam-Score: -0.7 (/) Cc: zeev@annapurnalabs.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch introduces support for waking up secondary CPU cores on Alpine platform. Signed-off-by: Barak Wasserstrom Signed-off-by: Tsahee Zidenberg --- arch/arm/mach-alpine/Kconfig | 2 + arch/arm/mach-alpine/Makefile | 1 + arch/arm/mach-alpine/alpine_cpu_pm.c | 69 ++++++++++++++++++++++++++++++++ arch/arm/mach-alpine/alpine_cpu_pm.h | 26 ++++++++++++ arch/arm/mach-alpine/alpine_cpu_resume.h | 38 ++++++++++++++++++ arch/arm/mach-alpine/platsmp.c | 49 +++++++++++++++++++++++ 6 files changed, 185 insertions(+) create mode 100644 arch/arm/mach-alpine/alpine_cpu_pm.c create mode 100644 arch/arm/mach-alpine/alpine_cpu_pm.h create mode 100644 arch/arm/mach-alpine/alpine_cpu_resume.h create mode 100644 arch/arm/mach-alpine/platsmp.c diff --git a/arch/arm/mach-alpine/Kconfig b/arch/arm/mach-alpine/Kconfig index 4548f32..fd5062a 100644 --- a/arch/arm/mach-alpine/Kconfig +++ b/arch/arm/mach-alpine/Kconfig @@ -4,5 +4,7 @@ config ARCH_ALPINE select ARM_GIC select GENERIC_IRQ_CHIP select HAVE_ARM_ARCH_TIMER + select HAVE_SMP + select MFD_SYSCON help This enables support for the Annapurna Labs Alpine V1 boards. diff --git a/arch/arm/mach-alpine/Makefile b/arch/arm/mach-alpine/Makefile index 8ba9e99..fad7a68 100644 --- a/arch/arm/mach-alpine/Makefile +++ b/arch/arm/mach-alpine/Makefile @@ -3,3 +3,4 @@ # obj-y += alpine_machine.o +obj-$(CONFIG_SMP) += platsmp.o alpine_cpu_pm.o diff --git a/arch/arm/mach-alpine/alpine_cpu_pm.c b/arch/arm/mach-alpine/alpine_cpu_pm.c new file mode 100644 index 0000000..95e4d13 --- /dev/null +++ b/arch/arm/mach-alpine/alpine_cpu_pm.c @@ -0,0 +1,69 @@ +/* + * Low-level power-management support for Alpine platform. + * + * Copyright (C) 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include + +#include + +#include "alpine_cpu_pm.h" +#include "alpine_cpu_resume.h" + +/* NB registers */ +#define AL_SYSFAB_POWER_CONTROL(cpu) (0x2000 + (cpu)*0x100 + 0x20) + +static struct regmap *al_sysfabric; +static struct al_cpu_resume_regs __iomem *al_cpu_resume_regs; +static int wakeup_supported; + +int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr) +{ + if (!wakeup_supported) + return -ENOSYS; + + /* Set CPU resume address - + * secure firmware running on boot will jump to this address + * after setting proper CPU mode, and initialiing e.g. secure regs + * (the same mode all CPUs are booted to - usually HYP) */ + writel(phys_resume_addr, + &al_cpu_resume_regs->per_cpu[phys_cpu].resume_addr); + + /* Power-up the CPU */ + regmap_write(al_sysfabric, AL_SYSFAB_POWER_CONTROL(phys_cpu), 0); + + return 0; +} + +void __init alpine_cpu_pm_init(void) +{ + struct device_node *np; + uint32_t watermark; + + al_sysfabric = syscon_regmap_lookup_by_compatible("al,alpine-sysfabric-service"); + + np = of_find_compatible_node(NULL, NULL, "al,alpine-cpu-resume"); + al_cpu_resume_regs = of_iomap(np, 0); + + wakeup_supported = (!IS_ERR(al_sysfabric)) && al_cpu_resume_regs; + + if (wakeup_supported) { + watermark = readl(&al_cpu_resume_regs->watermark); + wakeup_supported = ((watermark & AL_CPU_RESUME_MAGIC_NUM_MASK) + == AL_CPU_RESUME_MAGIC_NUM); + } +} diff --git a/arch/arm/mach-alpine/alpine_cpu_pm.h b/arch/arm/mach-alpine/alpine_cpu_pm.h new file mode 100644 index 0000000..4d32716 --- /dev/null +++ b/arch/arm/mach-alpine/alpine_cpu_pm.h @@ -0,0 +1,26 @@ +/* + * Low-level power-management support for Alpine platform. + * + * Copyright (C) 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ALPINE_CPU_PM_H__ +#define __ALPINE_CPU_PM_H__ + +/* Alpine CPU Power Management Services Initialization */ +void __init alpine_cpu_pm_init(void); + +/* Wake-up a CPU */ +int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr); + +#endif /* __ALPINE_CPU_PM_H__ */ diff --git a/arch/arm/mach-alpine/alpine_cpu_resume.h b/arch/arm/mach-alpine/alpine_cpu_resume.h new file mode 100644 index 0000000..c80150c --- /dev/null +++ b/arch/arm/mach-alpine/alpine_cpu_resume.h @@ -0,0 +1,38 @@ +/* + * Annapurna labs cpu-resume register structure. + * + * Copyright (C) 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef ALPINE_CPU_RESUME_H_ +#define ALPINE_CPU_RESUME_H_ + +/* Per-cpu regs */ +struct al_cpu_resume_regs_per_cpu { + uint32_t flags; + uint32_t resume_addr; +}; + +/* general regs */ +struct al_cpu_resume_regs { + /* Watermark for validating the CPU resume struct */ + uint32_t watermark; + uint32_t flags; + struct al_cpu_resume_regs_per_cpu per_cpu[]; +}; + +/* The expected magic number for validating the resume addresses */ +#define AL_CPU_RESUME_MAGIC_NUM 0xf0e1d200 +#define AL_CPU_RESUME_MAGIC_NUM_MASK 0xffffff00 + +#endif /* ALPINE_CPU_RESUME_H_ */ diff --git a/arch/arm/mach-alpine/platsmp.c b/arch/arm/mach-alpine/platsmp.c new file mode 100644 index 0000000..43b7641 --- /dev/null +++ b/arch/arm/mach-alpine/platsmp.c @@ -0,0 +1,49 @@ +/* + * SMP operations for Alpine platform. + * + * Copyright (C) 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include + +#include + +#include "alpine_cpu_pm.h" + +int __cpuinit alpine_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + phys_addr_t addr; + + addr = virt_to_phys(secondary_startup); + + if (addr > (phys_addr_t)(uint32_t)(-1)) { + pr_err("FAIL: resume address over 32bit (%pa)", &addr); + return -EINVAL; + } + + return alpine_cpu_wakeup(cpu_logical_map(cpu), (uint32_t)addr); +} + +void __init alpine_smp_prepare_cpus(unsigned int max_cpus) +{ + alpine_cpu_pm_init(); +} + +struct smp_operations __initdata alpine_smp_ops = { + .smp_prepare_cpus = alpine_smp_prepare_cpus, + .smp_boot_secondary = alpine_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(alpine_smp, "al,alpine-smp", &alpine_smp_ops);