From patchwork Tue Feb 3 13:29:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsahee Zidenberg X-Patchwork-Id: 5768421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 617C29F2ED for ; Tue, 3 Feb 2015 13:32:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5AAB8200E5 for ; Tue, 3 Feb 2015 13:32:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 05E1C20121 for ; Tue, 3 Feb 2015 13:32:17 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YIdYi-0000ts-OG; Tue, 03 Feb 2015 13:30:28 +0000 Received: from mail-wi0-f178.google.com ([209.85.212.178]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YIdY3-0007S0-UU for linux-arm-kernel@lists.infradead.org; Tue, 03 Feb 2015 13:29:48 +0000 Received: by mail-wi0-f178.google.com with SMTP id bs8so21783644wib.5 for ; Tue, 03 Feb 2015 05:29:28 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:user-agent :mime-version:content-type:content-transfer-encoding; bh=yUeL6BDAg8VZDfni4HgRfZ9RAhDbTCkDS80y5SwCTeg=; b=Y8q1gMdOH3WoH3zaFS/iR54tRZt3QcN+Yk5Ra47DwF4Oy+y67H+pUNLaYubtfBBoSf lytBfCKMxPUnxsI7YCHV8VH0YYvFKuwwWCEQYq6U/GkC8nb8pVNLv4ugJVI4pwl4fBw4 g0gIE98lG5w17wm0mUYTNRTx4sgBhLnxe7ykgofsBVMwY5g69KlFOm9vYoro+R/q0B3a 0m/zHvyBloGMoHJjrJ+FS65jzfPYxxIdprGkoyFLqZrep5IkmNY0C1DaSHq6uAyMNUBp 1xKOhXVhUbXSSqm53AQDbseEWr8vMduW5zDiQ0EbkTIrnlJETOEw0PcgVRNbkvdB+ajl f2/w== X-Gm-Message-State: ALoCoQlReA16ll4JJygG80DkJxLIuBhLcFgb8qlblbFAie4mRyGo2jNRrkvMMSntimKfYodjrGzq X-Received: by 10.180.9.115 with SMTP id y19mr34826673wia.32.1422970164846; Tue, 03 Feb 2015 05:29:24 -0800 (PST) Received: from localhost ([82.166.183.244]) by mx.google.com with ESMTPSA id hm6sm21923331wjb.32.2015.02.03.05.29.23 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 03 Feb 2015 05:29:24 -0800 (PST) Date: Tue, 03 Feb 2015 15:29:22 +0200 From: Tsahee Zidenberg To: arm@kernel.org, linux-arm-kernel@lists.infradead.org, barak@annapurnalabs.com, saeed@annapurnalabs.com Subject: [PATCH v4 5/6] ARM: dts: Alpine platform devicetree Message-ID: <54d0cd32.IGICqY8yCSKca3OH%tsahee@annapurnalabs.com> User-Agent: Heirloom mailx 12.5 6/20/10 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150203_052948_156272_E592D9F5 X-CRM114-Status: GOOD ( 14.97 ) X-Spam-Score: -0.7 (/) Cc: olof@lixom.net, mark.rutland@arm.com, zeev@annapurnalabs.com, rshitrit@annapurnalabs.com, maxime.coquelin@st.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch introduces devicetree for the Alpine platform, and for a development board based on the same platform. Signed-off-by: Barak Wasserstrom Signed-off-by: Tsahee Zidenberg Acked-by: Arnd Bergmann --- arch/arm/boot/dts/Makefile | 4 ++ arch/arm/boot/dts/alpine-db.dts | 35 ++++++++++ arch/arm/boot/dts/alpine.dtsi | 141 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 180 insertions(+) create mode 100644 arch/arm/boot/dts/alpine-db.dts create mode 100644 arch/arm/boot/dts/alpine.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a1c776b..024d107 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -2,6 +2,10 @@ ifeq ($(CONFIG_OF),y) dtb-$(CONFIG_MACH_ASM9260) += \ alphascale-asm9260-devkit.dtb + +dtb-$(CONFIG_ARCH_ALPINE) += \ + alpine_db.dtb + # Keep at91 dtb files sorted alphabetically for each SoC dtb-$(CONFIG_SOC_SAM_V4_V5) += \ at91rm9200ek.dtb \ diff --git a/arch/arm/boot/dts/alpine-db.dts b/arch/arm/boot/dts/alpine-db.dts new file mode 100644 index 0000000..dfb5a08 --- /dev/null +++ b/arch/arm/boot/dts/alpine-db.dts @@ -0,0 +1,35 @@ +/* + * Copyright 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * Alternatively, redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/dts-v1/; + +#include "alpine.dtsi" + +/ { + model = "Annapurna Labs Alpine Dev Board"; + /* no need for anything outside SOC */ +}; + diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi new file mode 100644 index 0000000..519f58c --- /dev/null +++ b/arch/arm/boot/dts/alpine.dtsi @@ -0,0 +1,141 @@ +/* + * Copyright 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * Alternatively, redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#include +#include "skeleton64.dtsi" + +/ { + /* SOC compatibility */ + compatible = "al,alpine"; + + /* CPU Configuration */ + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "al,alpine-smp"; + + cpu@0 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <0>; + clock-frequency = <0>; /* Filled by loader */ + }; + + cpu@1 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <1>; + clock-frequency = <0>; /* Filled by loader */ + }; + + cpu@2 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <2>; + clock-frequency = <0>; /* Filled by loader */ + }; + + cpu@3 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <3>; + clock-frequency = <0>; /* Filled by loader */ + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + interrupt-parent = <&gic>; + ranges; + + arch-timer { + compatible = "arm,cortex-a15-timer", + "arm,armv7-timer"; + interrupts = + , + , + , + ; + clock-frequency = <0>; /* Filled by loader */ + }; + + /* Interrupt Controller */ + gic: gic@fb001000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + #size-cells = <0>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xfb001000 0x0 0x1000>, + <0x0 0xfb002000 0x0 0x2000>, + <0x0 0xfb004000 0x0 0x1000>, + <0x0 0xfb006000 0x0 0x2000>; + interrupts = + ; + }; + + /* CPU Resume registers */ + cpu-resume@fbff5ec0 { + compatible = "al,alpine-cpu-resume"; + reg = <0x0 0xfbff5ec0 0x0 0x30>; + }; + + /* North Bridge Service Registers */ + sysfabric-service@fb070000 { + compatible = "al,alpine-sysfabric-service", "syscon"; + reg = <0x0 0xfb070000 0x0 0x10000>; + }; + + /* Performance Monitor Unit */ + pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = , + , + , + ; + }; + + uart0:uart@fd883000 { + compatible = "ns16550a"; + reg = <0x0 0xfd883000 0x0 0x1000>; + clock-frequency = <0>; /* Filled by loader */ + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + }; + + uart1:uart@0xfd884000 { + compatible = "ns16550a"; + reg = <0x0 0xfd884000 0x0 0x1000>; + clock-frequency = <0>; /* Filled by loader */ + interrupts = ; + reg-shift = <2>; + reg-io-width = <4>; + }; + }; +};