From patchwork Wed Apr 1 11:42:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason X-Patchwork-Id: 6139691 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 734CABF4A6 for ; Wed, 1 Apr 2015 11:50:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8744920172 for ; Wed, 1 Apr 2015 11:50:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8FF312012E for ; Wed, 1 Apr 2015 11:50:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YdH7Q-0002A6-L1; Wed, 01 Apr 2015 11:47:36 +0000 Received: from smtp2-g21.free.fr ([2a01:e0c:1:1599::11]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YdH3N-0007B3-R7 for linux-arm-kernel@lists.infradead.org; Wed, 01 Apr 2015 11:43:27 +0000 Received: from [172.27.0.114] (unknown [83.142.147.193]) (Authenticated sender: shill) by smtp2-g21.free.fr (Postfix) with ESMTPSA id 575C44B02AA; Wed, 1 Apr 2015 13:41:00 +0200 (CEST) Message-ID: <551BD9BF.8090808@free.fr> Date: Wed, 01 Apr 2015 13:42:55 +0200 From: Mason User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:35.0) Gecko/20100101 Firefox/35.0 SeaMonkey/2.32.1 MIME-Version: 1.0 To: Russell King - ARM Linux Subject: Re: Cache line size definition in arch/arm/mm/Kconfig References: <5512C7A4.3000302@free.fr> <5515423E.4020802@free.fr> <20150327120601.GB4019@n2100.arm.linux.org.uk> <55155EE9.6020600@free.fr> In-Reply-To: <55155EE9.6020600@free.fr> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150401_044326_083639_0FC1CB9E X-CRM114-Status: GOOD ( 18.66 ) X-Spam-Score: -0.7 (/) Cc: Thomas Gleixner , Ingo Molnar , Linux ARM , Nicolas Pitre X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 27/03/2015 14:45, Mason wrote: > arch/arm/mm/Kconfig > > config ARM_L1_CACHE_SHIFT_6 > bool > default y if CPU_V7 > help > Setting ARM L1 cache line size to 64 Bytes. > > config ARM_L1_CACHE_SHIFT > int > default 6 if ARM_L1_CACHE_SHIFT_6 > default 5 > > I don't understand why I should not override ARM_L1_CACHE_SHIFT to 5 > in my platform-specific Kconfig, since I know I have a 32-byte cache > line size? [large snip] It seems to me it would make sense to override ARM_L1_CACHE_SHIFT in the platform Kconfig. Or am I missing something obvious? (Perhaps it is expected that the gains would be minimal?) ARM_L1_CACHE_SHIFT = 6 2 .rodata 0008ea58 c026a000 c026a000 0026a000 2**6 20 .data 00027aa0 c033a000 c033a000 0034a000 2**6 ARM_L1_CACHE_SHIFT = 5 2 .rodata 0008e608 c026b000 c026b000 0026b000 2**5 20 .data 000252c0 c033a000 c033a000 0034a000 2**5 1104 bytes saved in .rodata (0.2%) 10208 bytes saved in .data (6.3%) This is for a minimal kernel (no drivers, only core). The space optimization seems to be not insignificant. > Oh and while I have your attention ;-) I have alignment-related > questions about clocksource_mmio_init() (commit 442c8176d2) wrt > Thomas Gleixner's 369db4c952 patch. (I think the two patches > do not play nice.) > > 369db4c952 moved some struct clocksource fields around to group > hot fields in a single cache line at the beginning of the struct, > and marked the struct as cache aligned. This works as expected > with static structures. Example patch for illustration purposes (only compile-tested) (There is probably a much more elegant way to get 32-byte aligned memory allocations.) Regards. diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c index c0e2512..77b91c5 100644 --- a/drivers/clocksource/mmio.c +++ b/drivers/clocksource/mmio.c @@ -10,34 +10,24 @@ #include #include -struct clocksource_mmio { - void __iomem *reg; - struct clocksource clksrc; -}; - -static inline struct clocksource_mmio *to_mmio_clksrc(struct clocksource *c) -{ - return container_of(c, struct clocksource_mmio, clksrc); -} - cycle_t clocksource_mmio_readl_up(struct clocksource *c) { - return readl_relaxed(to_mmio_clksrc(c)->reg); + return readl_relaxed(c->reg); } cycle_t clocksource_mmio_readl_down(struct clocksource *c) { - return ~readl_relaxed(to_mmio_clksrc(c)->reg); + return ~readl_relaxed(c->reg); } cycle_t clocksource_mmio_readw_up(struct clocksource *c) { - return readw_relaxed(to_mmio_clksrc(c)->reg); + return readw_relaxed(c->reg); } cycle_t clocksource_mmio_readw_down(struct clocksource *c) { - return ~(unsigned)readw_relaxed(to_mmio_clksrc(c)->reg); + return ~(unsigned)readw_relaxed(c->reg); } /** @@ -53,21 +43,22 @@ int __init clocksource_mmio_init(void __iomem *base, const char *name, unsigned long hz, int rating, unsigned bits, cycle_t (*read)(struct clocksource *)) { - struct clocksource_mmio *cs; + struct clocksource *cs; if (bits > 32 || bits < 16) return -EINVAL; - cs = kzalloc(sizeof(struct clocksource_mmio), GFP_KERNEL); + cs = kzalloc(sizeof *cs + 31, GFP_KERNEL); if (!cs) return -ENOMEM; + cs = PTR_ALIGN(cs, 32); cs->reg = base; - cs->clksrc.name = name; - cs->clksrc.rating = rating; - cs->clksrc.read = read; - cs->clksrc.mask = CLOCKSOURCE_MASK(bits); - cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; + cs->name = name; + cs->rating = rating; + cs->read = read; + cs->mask = CLOCKSOURCE_MASK(bits); + cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; - return clocksource_register_hz(&cs->clksrc, hz); + return clocksource_register_hz(cs, hz); } diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index 879065d..8b1d689 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h @@ -189,6 +189,9 @@ struct clocksource { unsigned long flags; void (*suspend)(struct clocksource *cs); void (*resume)(struct clocksource *cs); +#ifdef CONFIG_CLKSRC_MMIO + void __iomem *reg; +#endif /* private: */ #ifdef CONFIG_CLOCKSOURCE_WATCHDOG