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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id t14sm5815682wra.44.2017.07.20.05.17.14 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 20 Jul 2017 05:17:14 -0700 (PDT) From: Michal Simek To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 03/10] arm64: zynqmp: Add operating points Date: Thu, 20 Jul 2017 14:17:02 +0200 Message-Id: <560c538494f80ec67b553d26365bfaf0918f4215.1500552941.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170720_051746_507124_48C8F7E0 X-CRM114-Status: UNSURE ( 9.09 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , devicetree@vger.kernel.org, monstr@monstr.eu, Stefan Krsmanovic , Marc Zyngier , Will Deacon , Duc Dang , Shubhrajyoti Datta , linux-kernel@vger.kernel.org, Bharat Kumar Gogada , Rob Herring , Moritz Fischer , Carlo Caione , Catalin Marinas , Punnaiah Choudary Kalluri , Mark Rutland , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shubhrajyoti Datta Adding operating-points-v2 for zynqmp. Signed-off-by: Shubhrajyoti Datta Signed-off-by: Michal Simek --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 8e6cf0cf3a69..50636e098724 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -24,6 +24,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; reg = <0x0>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -33,6 +34,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x1>; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -41,6 +43,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x2>; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -49,6 +52,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x3>; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -66,6 +70,31 @@ }; }; + cpu_opp_table: cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + opp00 { + opp-hz = /bits/ 64 <1199999988>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp01 { + opp-hz = /bits/ 64 <599999994>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp02 { + opp-hz = /bits/ 64 <399999996>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp03 { + opp-hz = /bits/ 64 <299999997>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupt-parent = <&gic>;