From patchwork Tue Dec 1 14:35:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 7737821 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8EBF49F39D for ; Tue, 1 Dec 2015 14:43:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8072E2065D for ; Tue, 1 Dec 2015 14:43:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C5DA20650 for ; Tue, 1 Dec 2015 14:43:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a3m6a-0007nC-TO; Tue, 01 Dec 2015 14:40:32 +0000 Received: from szxga02-in.huawei.com ([119.145.14.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a3m6N-00061N-7n for linux-arm-kernel@lists.infradead.org; Tue, 01 Dec 2015 14:40:30 +0000 Received: from 172.24.1.51 (EHLO szxeml431-hub.china.huawei.com) ([172.24.1.51]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CXE65327; Tue, 01 Dec 2015 22:35:23 +0800 (CST) Received: from [127.0.0.1] (10.177.16.142) by szxeml431-hub.china.huawei.com (10.82.67.208) with Microsoft SMTP Server id 14.3.235.1; Tue, 1 Dec 2015 22:35:15 +0800 Message-ID: <565DB021.3020901@huawei.com> Date: Tue, 1 Dec 2015 22:35:13 +0800 From: Shannon Zhao User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Marc Zyngier Subject: Re: [PATCH v4 18/21] KVM: ARM64: Add PMU overflow interrupt routing References: <1446186123-11548-1-git-send-email-zhaoshenglong@huawei.com> <1446186123-11548-19-git-send-email-zhaoshenglong@huawei.com> <20151130182258.684c9df6@arm.com> In-Reply-To: <20151130182258.684c9df6@arm.com> X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.565DB02C.0062, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 4511cc01490f41a26fb3b1a06eddbfee X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151201_064029_189103_D64CC47B X-CRM114-Status: GOOD ( 18.60 ) X-Spam-Score: -4.2 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wei@redhat.com, kvm@vger.kernel.org, shannon.zhao@linaro.org, will.deacon@arm.com, peter.huangpeng@huawei.com, linux-arm-kernel@lists.infradead.org, alex.bennee@linaro.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, cov@codeaurora.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 2015/12/1 2:22, Marc Zyngier wrote: > On Fri, 30 Oct 2015 14:22:00 +0800 > Shannon Zhao wrote: > >> From: Shannon Zhao >> >> When calling perf_event_create_kernel_counter to create perf_event, >> assign a overflow handler. Then when perf event overflows, set >> irq_pending and call kvm_vcpu_kick() to sync the interrupt. >> >> Signed-off-by: Shannon Zhao >> --- >> arch/arm/kvm/arm.c | 4 +++ >> include/kvm/arm_pmu.h | 4 +++ >> virt/kvm/arm/pmu.c | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++- >> 3 files changed, 83 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c >> index 78b2869..9c0fec4 100644 >> --- a/arch/arm/kvm/arm.c >> +++ b/arch/arm/kvm/arm.c >> @@ -28,6 +28,7 @@ >> #include >> #include >> #include >> +#include >> >> #define CREATE_TRACE_POINTS >> #include "trace.h" >> @@ -551,6 +552,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) >> >> if (ret <= 0 || need_new_vmid_gen(vcpu->kvm)) { >> local_irq_enable(); >> + kvm_pmu_sync_hwstate(vcpu); > > This is very weird. Are you only injecting interrupts when a signal is > pending? I don't understand how this works... > >> kvm_vgic_sync_hwstate(vcpu); >> preempt_enable(); >> kvm_timer_sync_hwstate(vcpu); >> @@ -598,6 +600,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) >> kvm_guest_exit(); >> trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); >> >> + kvm_pmu_post_sync_hwstate(vcpu); >> + >> kvm_vgic_sync_hwstate(vcpu); >> >> preempt_enable(); >> diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h >> index acd025a..5e7f943 100644 >> --- a/include/kvm/arm_pmu.h >> +++ b/include/kvm/arm_pmu.h >> @@ -39,6 +39,8 @@ struct kvm_pmu { >> }; >> >> #ifdef CONFIG_KVM_ARM_PMU >> +void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu); >> +void kvm_pmu_post_sync_hwstate(struct kvm_vcpu *vcpu); > > Please follow the current terminology: _flush_ on VM entry, _sync_ on > VM exit. > Hi Marc, Is below patch the right way for this? diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 78b2869..84008d1 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -28,6 +28,7 @@ #include #include #include +#include #define CREATE_TRACE_POINTS #include "trace.h" @@ -531,6 +532,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) */ kvm_timer_flush_hwstate(vcpu); + kvm_pmu_flush_hwstate(vcpu); + /* * Preparing the interrupts to be injected also * involves poking the GIC, which must be done in a @@ -554,6 +557,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) kvm_vgic_sync_hwstate(vcpu); preempt_enable(); kvm_timer_sync_hwstate(vcpu); + kvm_pmu_sync_hwstate(vcpu); continue; } @@ -604,6 +608,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) kvm_timer_sync_hwstate(vcpu); + kvm_pmu_sync_hwstate(vcpu); + ret = handle_exit(vcpu, run, ret); } diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h index 47bbd43..edfe4e5 100644 --- a/include/kvm/arm_pmu.h +++ b/include/kvm/arm_pmu.h @@ -41,6 +41,8 @@ struct kvm_pmu { }; #ifdef CONFIG_KVM_ARM_PMU +void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu); +void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu); unsigned long kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u32 select_idx); void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u32 val); void kvm_pmu_enable_counter(struct kvm_vcpu *vcpu, u32 val, bool all_enable); @@ -51,6 +53,8 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u32 data, u32 select_idx); void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u32 val); #else +void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {} +void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {} unsigned long kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u32 select_idx) { return 0; diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index 15cac45..9aad2f7 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -21,6 +21,7 @@ #include #include #include +#include /** * kvm_pmu_get_counter_value - get PMU counter value @@ -79,6 +80,78 @@ static void kvm_pmu_stop_counter(struct kvm_pmc *pmc) } /** + * kvm_pmu_flush_hwstate - flush pmu state to cpu + * @vcpu: The vcpu pointer + * + * Inject virtual PMU IRQ if IRQ is pending for this cpu. + */ +void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) +{ + struct kvm_pmu *pmu = &vcpu->arch.pmu; + u32 overflow; + + if (!vcpu_mode_is_32bit(vcpu)) + overflow = vcpu_sys_reg(vcpu, PMOVSSET_EL0); + else + overflow = vcpu_cp15(vcpu, c9_PMOVSSET); + + if ((pmu->irq_pending || overflow != 0) && (pmu->irq_num != -1)) + kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, pmu->irq_num, 1); + + pmu->irq_pending = false; +} + +/** + * kvm_pmu_sync_hwstate - sync pmu state for cpu + * @vcpu: The vcpu pointer + * + * Inject virtual PMU IRQ if IRQ is pending for this cpu when back from guest. + */ +void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) +{ + struct kvm_pmu *pmu = &vcpu->arch.pmu; + + if (pmu->irq_pending && (pmu->irq_num != -1)) + kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, pmu->irq_num, 1); + + pmu->irq_pending = false; +} -- Shannon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel