From patchwork Thu Jan 7 14:35:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 7977771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3BCFB9F1CC for ; Thu, 7 Jan 2016 14:39:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4E5B62011E for ; Thu, 7 Jan 2016 14:39:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6030E20103 for ; Thu, 7 Jan 2016 14:39:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aHBhH-0001Ry-22; Thu, 07 Jan 2016 14:37:51 +0000 Received: from szxga03-in.huawei.com ([119.145.14.66]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aHBhA-00016l-4m for linux-arm-kernel@lists.infradead.org; Thu, 07 Jan 2016 14:37:46 +0000 Received: from 172.24.1.50 (EHLO szxeml433-hub.china.huawei.com) ([172.24.1.50]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BUD89615; Thu, 07 Jan 2016 22:36:08 +0800 (CST) Received: from [127.0.0.1] (10.177.16.142) by szxeml433-hub.china.huawei.com (10.82.67.210) with Microsoft SMTP Server id 14.3.235.1; Thu, 7 Jan 2016 22:35:55 +0800 Message-ID: <568E77C9.4060004@huawei.com> Date: Thu, 7 Jan 2016 22:35:53 +0800 From: Shannon Zhao User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Marc Zyngier , , Subject: Re: [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device References: <1450771695-11948-1-git-send-email-zhaoshenglong@huawei.com> <1450771695-11948-21-git-send-email-zhaoshenglong@huawei.com> <568E6E94.8090106@arm.com> In-Reply-To: <568E6E94.8090106@arm.com> X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020203.568E77D9.02FB, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: c006750b07c478e68e0d5d5dd25b55a9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160107_063744_620890_0FD79119 X-CRM114-Status: GOOD ( 20.46 ) X-Spam-Score: -4.2 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wei@redhat.com, hangaohuai@huawei.com, kvm@vger.kernel.org, will.deacon@arm.com, peter.huangpeng@huawei.com, shannon.zhao@linaro.org, linux-arm-kernel@lists.infradead.org, cov@codeaurora.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 2016/1/7 21:56, Marc Zyngier wrote: > On 22/12/15 08:08, Shannon Zhao wrote: >> > From: Shannon Zhao >> > >> > Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement >> > the kvm_device_ops for it. >> > >> > Signed-off-by: Shannon Zhao >> > --- >> > Documentation/virtual/kvm/devices/arm-pmu.txt | 24 +++++ >> > arch/arm64/include/uapi/asm/kvm.h | 4 + >> > include/linux/kvm_host.h | 1 + >> > include/uapi/linux/kvm.h | 2 + >> > virt/kvm/arm/pmu.c | 128 ++++++++++++++++++++++++++ >> > virt/kvm/kvm_main.c | 4 + >> > 6 files changed, 163 insertions(+) >> > create mode 100644 Documentation/virtual/kvm/devices/arm-pmu.txt >> > >> > diff --git a/Documentation/virtual/kvm/devices/arm-pmu.txt b/Documentation/virtual/kvm/devices/arm-pmu.txt >> > new file mode 100644 >> > index 0000000..dda864e >> > --- /dev/null >> > +++ b/Documentation/virtual/kvm/devices/arm-pmu.txt >> > @@ -0,0 +1,24 @@ >> > +ARM Virtual Performance Monitor Unit (vPMU) >> > +=========================================== >> > + >> > +Device types supported: >> > + KVM_DEV_TYPE_ARM_PMU_V3 ARM Performance Monitor Unit v3 >> > + >> > +Instantiate one PMU instance for per VCPU through this API. >> > + >> > +Groups: >> > + KVM_DEV_ARM_PMU_GRP_IRQ >> > + Attributes: >> > + The attr field of kvm_device_attr encodes one value: >> > + bits: | 63 .... 32 | 31 .... 0 | >> > + values: | reserved | vcpu_index | >> > + A value describing the PMU overflow interrupt number for the specified >> > + vcpu_index vcpu. This interrupt could be a PPI or SPI, but for one VM the >> > + interrupt type must be same for each vcpu. As a PPI, the interrupt number is >> > + same for all vcpus, while as a SPI it must be different for each vcpu. > I don't see anything enforcing these restrictions in the code (you can > program different PPIs on each vcpu, or the same SPI everywhere, and > nothing will generate an error). > > Is that something we want to enforce? Or we're happy just to leave it as > an unsupported corner case? > Yeah, it should add the check. How about below check? return -EINVAL; return kvm_arm_pmu_irq_access(dev->kvm, attr, ®, true); Thanks, diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index 0ccf273..c3347e9 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -435,6 +435,29 @@ static void kvm_arm_pmu_destroy(struct kvm_device *dev) kfree(dev); } +static bool irq_is_invalid(kvm_device *dev, int irq, bool is_ppi) +{ + int i; + struct kvm_vcpu *vcpu; + struct kvm *kvm = dev->kvm; + + kvm_for_each_vcpu(i, vcpu, kvm) { + struct kvm_pmu *pmu = &vcpu->arch.pmu; + + if (!kvm_arm_pmu_initialized(vcpu)) + continue; + + if (is_ppi) + if (pmu->irq_num != irq) + return true; + else + if (pmu->irq_num == irq) + return true; + } + + return false; +} + static int kvm_arm_pmu_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr) { @@ -452,7 +475,8 @@ static int kvm_arm_pmu_set_attr(struct kvm_device *dev, * the interrupt number is same for all vcpus, while as a SPI it * must be different for each vcpu. */ - if (reg < VGIC_NR_SGIS || reg >= dev->kvm->arch.vgic.nr_irqs) + if (reg < VGIC_NR_SGIS || reg >= dev->kvm->arch.vgic.nr_irqs || + irq_is_invalid(dev, reg, reg < VGIC_NR_PRIVATE_IRQS))