From patchwork Sat Jul 1 06:33:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Anand X-Patchwork-Id: 9820731 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4C3D6602CC for ; Sat, 1 Jul 2017 06:34:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 332B62855E for ; Sat, 1 Jul 2017 06:34:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 25EA228637; Sat, 1 Jul 2017 06:34:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A1B922855E for ; Sat, 1 Jul 2017 06:34:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=ZQgJJ3qimc3sgemk3x/48me+YYE5EXV43rblMcnoT30=; b=W4U eJbvU1Y1RVD/c5wEfQpsJ+wt2K8P9tUkEVyt2tpZ56BdbNqS+bXSs7A0lRXjSLFFHi4upDoIav9V/ uqWOvVX7OmjpFvAbDGNAK9F/tYqXt+jT0YH4F3/x66KVmnDESoziZajA0QAcQkskSX9Up1vwClgmu OBDHSnhyuYQANYNAZad55GcnEudqujlWFGqDnOPn4vRoHbAaCGOEzqDOrU0UxDRcsVnassBY+tqUG R41jMsCbNuNV5v6RhtZuBeEsL0Q4CnqO+VgPuBluICxS/Alw9k2/Ur7Z3/N4Zr7f3qZR9byllcceW gQOy/1H1ga6ubtERQezY/vqIUd2WwnQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dRByy-00062H-8a; Sat, 01 Jul 2017 06:34:16 +0000 Received: from mail-pg0-f43.google.com ([74.125.83.43]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dRByu-0005ym-GS for linux-arm-kernel@lists.infradead.org; Sat, 01 Jul 2017 06:34:14 +0000 Received: by mail-pg0-f43.google.com with SMTP id u62so72812068pgb.3 for ; Fri, 30 Jun 2017 23:33:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=rX3e0oF76B7o1xea1uvPMFRE29T6oMwBwFi3bu4O26s=; b=sNvCfUlV0WSzOL6reMs2Ew2fMhNM/TgVayEU+FLvZ5XOKNvRACQhje+lMgYUk0Eiis CXtPZtIKAroKZQH5Ep/EVhaLJkGSxE8ZVVo7SBsLhBHL0H5CvdY31tXZp6jEJEathtbG zfoQB9qDg9Nl3qnizeORMJQ5LLhxxkDc3HHS+X7tgiPEioCUeTG5oUxxmn+31HmP7dCz KqglG2wRuqtobt63LZYnNaiDakffMUfY0J31/NGGXD/kXRuHolM7hJUzOuLjG4VOvHBu 44mG6f6k3NVQOu/VjelCu7814JGuTCLTZShKShi0M0Vc0uPknGmgKfiTOXzc6ZAjhEfE iLZg== X-Gm-Message-State: AKS2vOxZjezYhamQ4vwLogLmx9MCthRmGwwaOCWX14MgwQEJcATSdVGx vuNNf1BpnLtUAsCFG17uuQ== X-Received: by 10.99.106.66 with SMTP id f63mr24786805pgc.150.1498890831104; Fri, 30 Jun 2017 23:33:51 -0700 (PDT) Received: from localhost ([122.162.73.187]) by smtp.gmail.com with ESMTPSA id a4sm23965143pfc.22.2017.06.30.23.33.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 30 Jun 2017 23:33:50 -0700 (PDT) From: Pratyush Anand To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: perf: Allow more than one cycle counter to be used Date: Sat, 1 Jul 2017 12:03:35 +0530 Message-Id: <5817e4915963d7fae5928a77d85f7e0c4dca290c.1498890614.git.panand@redhat.com> X-Mailer: git-send-email 2.9.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170630_233412_571865_35C7B549 X-CRM114-Status: GOOD ( 12.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pratyush Anand , will.deacon@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Currently: $ perf stat -e cycles:u -e cycles:k true Performance counter stats for 'true': 2,24,699 cycles:u cycles:k (0.00%) 0.000788087 seconds time elapsed We can not count more than one cycle counter in one instance,because we allow to map cycle counter into PMCCNTR_EL0 only. However, if I did not miss anything then specification do not prohibit to use PMEVCNTR_EL0 for cycle count as well. Modify the code so that it still prefers to use PMCCNTR_EL0 for cycle counter, however allow to use PMEVCNTR_EL0 if PMCCNTR_EL0 is already in use. After this patch: $ perf stat -e cycles:u -e cycles:k true Performance counter stats for 'true': 2,17,310 cycles:u 7,40,009 cycles:k 0.000764149 seconds time elapsed Signed-off-by: Pratyush Anand --- arch/arm64/kernel/perf_event.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 83a1b1ad189f..43c77314f345 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -846,17 +846,14 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc, struct hw_perf_event *hwc = &event->hw; unsigned long evtype = hwc->config_base & ARMV8_PMU_EVTYPE_EVENT; - /* Always place a cycle counter into the cycle counter. */ + /* Always prefer to place a cycle counter into the cycle counter. */ if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) { - if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) - return -EAGAIN; - - return ARMV8_IDX_CYCLE_COUNTER; + if (!test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) + return ARMV8_IDX_CYCLE_COUNTER; } /* - * For anything other than a cycle counter, try and use - * the events counters + * Otherwise use events counters */ for (idx = ARMV8_IDX_COUNTER0; idx < cpu_pmu->num_events; ++idx) { if (!test_and_set_bit(idx, cpuc->used_mask))