| Message ID | 5859da6629b8b6c100eca4062dd193105bf829ba.1702352117.git.daniel@makrotopia.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add support for 10G Ethernet SerDes on MT7988 | expand |
On Tue, 12 Dec 2023 03:48:10 +0000, Daniel Golle wrote: > Several clocks as well as both sgmiisys phandles were added by mistake > to the Ethernet bindings for MT7988. > > This happened because the vendor driver which served as a reference > uses a high number of syscon phandles to access various parts of the > SoC which wasn't acceptable upstream. Hence several parts which have > never previously been supported (such SerDes PHY and USXGMII PCS) have > been moved to separate drivers which also result in a much more sane > device tree. > > Quickly align the bindings with the upcoming reality of the drivers > actually adding full support for this SoC. > > Fixes: c94a9aabec36 ("dt-bindings: net: mediatek,net: add mt7988-eth binding") > Signed-off-by: Daniel Golle <daniel@makrotopia.org> > --- > .../devicetree/bindings/net/mediatek,net.yaml | 32 ++++--------------- > 1 file changed, 7 insertions(+), 25 deletions(-) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/net/pcs/mediatek,usxgmii.example.dts:18:18: fatal error: dt-bindings/clock/mediatek,mt7988-clk.h: No such file or directory make[2]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/net/pcs/mediatek,usxgmii.example.dtb] Error 1 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/5859da6629b8b6c100eca4062dd193105bf829ba.1702352117.git.daniel@makrotopia.org The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Tue, Dec 12, 2023 at 03:48:10AM +0000, Daniel Golle wrote: > Several clocks as well as both sgmiisys phandles were added by mistake > to the Ethernet bindings for MT7988. > > This happened because the vendor driver which served as a reference > uses a high number of syscon phandles to access various parts of the > SoC which wasn't acceptable upstream. Hence several parts which have > never previously been supported (such SerDes PHY and USXGMII PCS) have > been moved to separate drivers which also result in a much more sane > device tree. > > Quickly align the bindings with the upcoming reality of the drivers > actually adding full support for this SoC. > > Fixes: c94a9aabec36 ("dt-bindings: net: mediatek,net: add mt7988-eth binding") > Signed-off-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor.
diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml index e74502a0afe86..030d106bc7d3f 100644 --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -337,32 +337,23 @@ allOf: minItems: 4 clocks: - minItems: 34 - maxItems: 34 + minItems: 24 + maxItems: 24 clock-names: items: - - const: crypto + - const: xgp1 + - const: xgp2 + - const: xgp3 - const: fe - const: gp2 - const: gp1 - const: gp3 + - const: esw + - const: crypto - const: ethwarp_wocpu2 - const: ethwarp_wocpu1 - const: ethwarp_wocpu0 - - const: esw - - const: netsys0 - - const: netsys1 - - const: sgmii_tx250m - - const: sgmii_rx250m - - const: sgmii2_tx250m - - const: sgmii2_rx250m - - const: top_usxgmii0_sel - - const: top_usxgmii1_sel - - const: top_sgm0_sel - - const: top_sgm1_sel - - const: top_xfi_phy0_xtal_sel - - const: top_xfi_phy1_xtal_sel - const: top_eth_gmii_sel - const: top_eth_refck_50m_sel - const: top_eth_sys_200m_sel @@ -375,15 +366,6 @@ allOf: - const: top_netsys_sync_250m_sel - const: top_netsys_ppefb_250m_sel - const: top_netsys_warp_sel - - const: wocpu1 - - const: wocpu0 - - const: xgp1 - - const: xgp2 - - const: xgp3 - - mediatek,sgmiisys: - minItems: 2 - maxItems: 2 patternProperties: "^mac@[0-1]$":
Several clocks as well as both sgmiisys phandles were added by mistake to the Ethernet bindings for MT7988. This happened because the vendor driver which served as a reference uses a high number of syscon phandles to access various parts of the SoC which wasn't acceptable upstream. Hence several parts which have never previously been supported (such SerDes PHY and USXGMII PCS) have been moved to separate drivers which also result in a much more sane device tree. Quickly align the bindings with the upcoming reality of the drivers actually adding full support for this SoC. Fixes: c94a9aabec36 ("dt-bindings: net: mediatek,net: add mt7988-eth binding") Signed-off-by: Daniel Golle <daniel@makrotopia.org> --- .../devicetree/bindings/net/mediatek,net.yaml | 32 ++++--------------- 1 file changed, 7 insertions(+), 25 deletions(-)