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Fri, 12 Apr 2024 20:44:03 -0700 From: Nicolin Chen To: , CC: , , , , , , , , Subject: [PATCH v5 2/6] iommu/arm-smmu-v3: Make arm_smmu_cmdq_init reusable Date: Fri, 12 Apr 2024 20:43:50 -0700 Message-ID: <5a5dd54c013aafb88c09d087712be2e163b1ff87.1712977210.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06F:EE_|IA1PR12MB9064:EE_ X-MS-Office365-Filtering-Correlation-Id: dd46b9ef-7133-4698-57ce-08dc5b6bfae8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: DKPyNABW29hojha1/FWmMcp9zf8Dw5VR+jTqzvkVtMUEpMU5s6FjsU1Xypx1IQVuUfS3p9FHYl/ASmngaE/EGU2+/Bp75aNIO9C5DqZ2r8ZiZ0hL2WnmyuIOXQW66AKCXy8Hkp2tilgPdO3Mr+W/d5HTGzcPx4y3RTXKEZVlsFTx8SOnpUEoLt/C1LvjzxUjVY+nAskuGqSPoIms/8PXX4+XN4si1o7QPaZeGt9VBZ4GbHfNnBigXyT6osS5u7rGYmFXBCv4UcinLr5WMtQZRPdOy+XC1ehdJh5qDe4SG7tLxRVUNL4EP+iyUxMxUP8kHECYRJFaOuWsQEpQeZqKdoi2ANuYPekNo5Gz58GcwvC9FpFPdYRHWjkBmcjeYW8cnjf70OpJffZbDAen0bLNSdmn5ll2iGVBGhS3IFvcOUxw4m2QpD19sitN1u5izQzER1er36Ga/c+D8GqaP3XKN7hYkqBAMVCiWHVCpmweFrYZ9vwOLI4Dk3Np6oAeqCgXz+O2TaIKv1LnN73LQ/jXfUCUF8QCJYk06Jrgbq+2Rmi983xyyjAUhfgHqCG2zivvCzJ5luMLTAmEoJq2YtIvPcEFIGM2tbKHlBqGEiuCWaQUrX9KyIkguWvjYD/kErEeh17aXmRxN/SkjXtA5nyGMUjng4UPNLKfiyZAx9PV1qHFMze5g6wHq/3ruzl1tmJZQvKAZjk7yZeUhxELUvN0jSnbM/BbrvhTze6K4B8eKb5VNihTTmsCy6wEq9HgEyRW X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(376005)(1800799015)(36860700004)(82310400014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2024 03:44:10.7051 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dd46b9ef-7133-4698-57ce-08dc5b6bfae8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06F.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB9064 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240412_204423_251135_CE1D8DA0 X-CRM114-Status: GOOD ( 12.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The CMDQV extension in NVIDIA Tegra241 SoC resues the arm_smmu_cmdq structure while the queue location isn't same as smmu->cmdq. Add a cmdq argument to arm_smmu_cmdq_init() function and shares its define in the header for CMDQV driver to use. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +++--- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 385a6e72b2f2..18da1a317823 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3144,9 +3144,9 @@ static int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, return 0; } -static int arm_smmu_cmdq_init(struct arm_smmu_device *smmu) +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq) { - struct arm_smmu_cmdq *cmdq = &smmu->cmdq; unsigned int nents = 1 << cmdq->q.llq.max_n_shift; atomic_set(&cmdq->owner_prod, 0); @@ -3171,7 +3171,7 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu) if (ret) return ret; - ret = arm_smmu_cmdq_init(smmu); + ret = arm_smmu_cmdq_init(smmu, &smmu->cmdq); if (ret) return ret; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index bbee08e82943..ab2824e46ac5 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -760,6 +760,9 @@ bool arm_smmu_free_asid(struct arm_smmu_ctx_desc *cd); int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, int ssid, unsigned long iova, size_t size); +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq); + #ifdef CONFIG_ARM_SMMU_V3_SVA bool arm_smmu_sva_supported(struct arm_smmu_device *smmu); bool arm_smmu_master_sva_supported(struct arm_smmu_master *master);