Message ID | 5b942daad7854c50faabbc9ce8e24c2ade74f641.1592407030.git.cristian.ciocaltea@gmail.com (mailing list archive) |
---|---|
State | New, archived |
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Wed, 17 Jun 2020 09:48:23 -0700 (PDT) From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> To: Rob Herring <robh+dt@kernel.org>, =?utf-8?q?Andreas_F=C3=A4rber?= <afaerber@suse.de>, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Subject: [PATCH 07/11] arm: dts: owl-s500: Add DMA controller Date: Wed, 17 Jun 2020 19:48:07 +0300 Message-Id: <5b942daad7854c50faabbc9ce8e24c2ade74f641.1592407030.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <cover.1592407030.git.cristian.ciocaltea@gmail.com> References: <cover.1592407030.git.cristian.ciocaltea@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200617_094825_806170_10FAEB57 X-CRM114-Status: UNSURE ( 8.29 ) X-CRM114-Notice: Please train this message. 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Series |
Add CMU/RMU/DMA support for Actions Semi S500 SoCs
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expand
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diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi index ac3d04c75dd5..0f4fc5487dad 100644 --- a/arch/arm/boot/dts/owl-s500.dtsi +++ b/arch/arm/boot/dts/owl-s500.dtsi @@ -205,5 +205,19 @@ sps: power-controller@b01b0100 { reg = <0xb01b0100 0x100>; #power-domain-cells = <1>; }; + + dma: dma-controller@b0260000 { + compatible = "actions,s900-dma"; + reg = <0xb0260000 0xd00>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + dma-channels = <12>; + dma-requests = <46>; + clocks = <&cmu CLK_DMAC>; + power-domains = <&sps S500_PD_DMA>; + }; }; };
Add DMA controller node for Actions Semi S500 SoC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> --- arch/arm/boot/dts/owl-s500.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)