| Message ID | 5c2810b698c5099264b82a7f6fbed13e66062307.1607601615.git.baruch@tkos.co.il (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | gpio: mvebu: Armada 8K/7K PWM support | expand |
On Thu, 10 Dec 2020 14:16:00 +0200, Baruch Siach wrote: > Update the example as well. Add the '#pwm-cells' and 'clocks' properties > for a complete working example. > > Signed-off-by: Baruch Siach <baruch@tkos.co.il> > --- > .../bindings/arm/marvell/ap80x-system-controller.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt index e31511255d8e..052a967c1f28 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt @@ -80,6 +80,11 @@ Required properties: - offset: offset address inside the syscon block +Optional properties: + +- marvell,pwm-offset: offset address of PWM duration control registers inside + the syscon block + Example: ap_syscon: system-controller@6f4000 { compatible = "syscon", "simple-mfd"; @@ -101,6 +106,9 @@ ap_syscon: system-controller@6f4000 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&ap_pinctrl 0 0 19>; + marvell,pwm-offset = <0x10c0>; + #pwm-cells = <2>; + clocks = <&ap_clk 3>; }; };
Update the example as well. Add the '#pwm-cells' and 'clocks' properties for a complete working example. Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- .../bindings/arm/marvell/ap80x-system-controller.txt | 8 ++++++++ 1 file changed, 8 insertions(+)