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[2/4] arm64: dts: Add the device tree entry for the APM X-Gene PCIe MSI node.

Message ID 62ab7c42fb400d38eae837b9e090d39b6cc95932.1420499393.git.dhdang@apm.com (mailing list archive)
State New, archived
Headers show

Commit Message

Duc Dang Jan. 6, 2015, 4:15 p.m. UTC 
There is single MSI block in X-Gene v1 SOC which serves all 5 PCIe ports.

Signed-off-by: Tanmay Inamdar <tinamdar@apm.com>
Signed-off-by: Duc Dang <dhdang@apm.com>
---
 arch/arm64/boot/dts/apm/apm-storm.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
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Patch

diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index f1ad9c2..70ba721 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -469,6 +469,27 @@ 
 			clocks = <&pcie4clk 0>;
 		};
 
+		msi: msi@79000000 {
+			compatible = "apm,xgene-storm-pcie-msi", "apm,xgene-pcie-msi";
+			reg = <0x00 0x79000000 0x0 0x900000>;
+			interrupts = <  0x0 0x10 0x4
+					0x0 0x11 0x4
+					0x0 0x12 0x4
+					0x0 0x13 0x4
+					0x0 0x14 0x4
+					0x0 0x15 0x4
+					0x0 0x16 0x4
+					0x0 0x17 0x4
+					0x0 0x18 0x4
+					0x0 0x19 0x4
+					0x0 0x1a 0x4
+					0x0 0x1b 0x4
+					0x0 0x1c 0x4
+					0x0 0x1d 0x4
+					0x0 0x1e 0x4
+					0x0 0x1f 0x4>;
+		};
+
 		serial0: serial@1c020000 {
 			status = "disabled";
 			device_type = "serial";